TMS320F280048-Q1: ADC Oversampling on one PWM switching cycle

There is an example in C2000Ware that will show the basics of connecting the ePWM as a trigger for the ADC SOC(Start of Conversion) here C:\ti\c2000\C2000Ware_5_00_00_00\device_support\f28004x\examples\adc 

Inside the initEPWM() function you will see that ePWM1 is set up to generate its SOCA on up count and on 1st event(I think this is what you want for the above), this will give a starting point there.

For the ADC setup, the initADCSOC function will be good as well, it gives example for ADCA SOC0, in your case you want to change to ADCB and the channel to B3 and B6.  Since you want to oversample 4x you can just repeat these channels tied to the same trigger source and the round robin logic in the ADC controller will handle the rest.

    AdcbRegs.ADCSOC0CTL.bit.CHSEL = 3;     // SOC0 will convert pin B3
    AdcbRegs.ADCSOC0CTL.bit.ACQPS = 9;     // Sample window is 10 SYSCLK cycles
    AdcbRegs.ADCSOC0CTL.bit.TRIGSEL = 5;   // Trigger on ePWM1 SOCA

    AdcbRegs.ADCSOC1CTL.bit.CHSEL = 6;     // SOC1 will convert pin B6
    AdcbRegs.ADCSOC1CTL.bit.ACQPS = 9;     // Sample window is 10 SYSCLK cycles
    AdcbRegs.ADCSOC1CTL.bit.TRIGSEL = 5;   // Trigger on ePWM1 SOCA

    AdcbRegs.ADCSOC2CTL.bit.CHSEL = 3;     // SOC2 will convert pin B3
    AdcbRegs.ADCSOC2CTL.bit.ACQPS = 9;     // Sample window is 10 SYSCLK cycles
    AdcbRegs.ADCSOC2CTL.bit.TRIGSEL = 5;   // Trigger on ePWM1 SOCA

    AdcbRegs.ADCSOC3CTL.bit.CHSEL = 6;     // SOC3 will convert pin B6
    AdcbRegs.ADCSOC3CTL.bit.ACQPS = 9;     // Sample window is 10 SYSCLK cycles
    AdcbRegs.ADCSOC3CTL.bit.TRIGSEL = 5;   // Trigger on ePWM1 SOCA
    
    AdcbRegs.ADCSOC4CTL.bit.CHSEL = 3;     // SOC4 will convert pin B3
    AdcbRegs.ADCSOC4CTL.bit.ACQPS = 9;     // Sample window is 10 SYSCLK cycles
    AdcbRegs.ADCSOC4CTL.bit.TRIGSEL = 5;   // Trigger on ePWM1 SOCA

    AdcbRegs.ADCSOC5CTL.bit.CHSEL = 6;     // SOC5 will convert pin B6
    AdcbRegs.ADCSOC5CTL.bit.ACQPS = 9;     // Sample window is 10 SYSCLK cycles
    AdcbRegs.ADCSOC5CTL.bit.TRIGSEL = 5;   // Trigger on ePWM1 SOCA
    
    AdcbRegs.ADCSOC6CTL.bit.CHSEL = 3;     // SOC6 will convert pin B3
    AdcbRegs.ADCSOC6CTL.bit.ACQPS = 9;     // Sample window is 10 SYSCLK cycles
    AdcbRegs.ADCSOC6CTL.bit.TRIGSEL = 5;   // Trigger on ePWM1 SOCA

    AdcbRegs.ADCSOC7CTL.bit.CHSEL = 6;     // SOC7 will convert pin B6
    AdcbRegs.ADCSOC7CTL.bit.ACQPS = 9;     // Sample window is 10 SYSCLK cycles
    AdcbRegs.ADCSOC7CTL.bit.TRIGSEL = 5;   // Trigger on ePWM1 SOCA
    
    
    AdcbRegs.ADCINTSEL1N2.bit.INT1SEL = 7; // End of SOC7 will set INT1 flag
    AdcbRegs.ADCINTSEL1N2.bit.INT1E = 1;   // Enable INT1 flag
    AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; // Make sure INT1 flag is cleared

Best,
Matthew

Hi Matthew,

Thanks for clear explanation. In my application:

*Tpwm is 10usec. | *MCU runs at 100MHz. | *ADC runs at 50Mhz. | *ACQ window duration is 20 sample window for each channel. 

ACQ window duration takes 200nsec. Conversion takes 21 SYSCLK = 420nsec. Total 620nsec for one port. If I need to convert two ports, it will be 1240nsec.

I think your solution fits to my timings.

I have two more question.

1) What if I need to sample only one ADC port and I require equally divide ADC timings as below. Which method should I use?

2) I think that ADCB EOC interrupt has higher priority to ADCC EOC.  Therefore, my main ISR that runs control loop code will be interrupted by ADCB1 interrupt. Can you confirm?

Thanks in advance.

Hello,

Our expert on this topic is currently out of office and is expected to be back by 27th November. Please expect delay in response.

Regards,

Hadi

Gokhan,

Thanks for the extra information from your attachment. I we want the ADC conversions to occur at those predefined intervals(every 1.25us) we will need to add some additional logic to the mix.  In my earlier post the samples would occur co-incident to one another, if we only use the one trigger.

For your case, we should make the period of the ePWM that is driving the ADC triggers match the period you have shown(every 1.25us).  you will then want to use burst mode in the ADC(https://www.ti.com/lit/ug/sprui33g see page 1556) so that each trigger only does one conversion.  So essentially all the SOCs will be from the same trigger, but depending on your setup you can do one or 2 SOCs each time that ePWM trigger arrives.  

You would still tie the ADCINT to the last SOC in the group.

For Q2, while the priority you have mentioned is correct, upon entry to an ISR all other interrupts are disabled and not re-enabled until the ISR returns to the main.  So even if ADCB comes in, if it is after ADCC has already been serviced it will just pend.

Best,

Matthew

Matthew,

I will reply to with some question at the end of next week. PLEASE, don't close issue.

Hi Matthew,

Thanks for detailed explanation.

First of all, I don't have any extra PWM ports to generate predefined intervals(every 1.25us).

PWM1,PWM2,PWM3,PWM4 drives MOSFETs for power conversion.

PWM5 and PWM6 is used for SPI.

PWM7 is used as UART.

PWM8 is used for booting but I programmed it 200kHz PWM to use PCMC for PSFB topology.

1) Can I program and use PWM5 or 6 or 7 in order to generate predefined intervals(every 1.25us) for ADC soc trigger without any misfunction on SPI and UART?

2) If there is no way to generate any predefined intervals(every 1.25us) for ADC soc trigger, actually it will be answer of 1) , is there any method to achieve this problem?

I also have 200kHz PWM on PWM8 that is used for PCMC. I can change my ADCTriggerEventPresaceler to 2 or 3 and have some extra time to oversample the ports. After my PID calculations, pending ADC isr start to run. I showed in below considering my 200kHz PWM8 will trigger ADC soc for B port at each zero. 

3) Can I set my 200kHz PWM for adc trigger source on CMPA and make CMPA value increase at each 200kHz in order to have well distribuded trigger? Those will be done remaining time after my PID calculations.

4) This is a basic question but I need to confirm again. Can ADC sample, hold and convert to digital process run behind without disturbing my ISR PID function? Can MCU have such parallel processing capacity as hardware inside? 

Gokhan G. said:

1) Can I program and use PWM5 or 6 or 7 in order to generate predefined intervals(every 1.25us) for ADC soc trigger without any misfunction on SPI and UART?

Yes, we do not need to bring the PWM to a physical GPIO pin, we just need to use the counter/match functions to generate the signals that will ultimately trigger the ADC.  When I mentioned unused PWMs, I should have clarified at the module level, not the pin level.

Gokhan G. said:

2) If there is no way to generate any predefined intervals(every 1.25us) for ADC soc trigger, actually it will be answer of 1) , is there any method to achieve this problem?

I also have 200kHz PWM on PWM8 that is used for PCMC. I can change my ADCTriggerEventPresaceler to 2 or 3 and have some extra time to oversample the ports. After my PID calculations, pending ADC isr start to run. I showed in below considering my 200kHz PWM8 will trigger ADC soc for B port at each zero. 

You could co-opt this as you described, I think based on my answer to #1 you should have the spare PWM to get the exact interval you want

Gokhan G. said:

3) Can I set my 200kHz PWM for adc trigger source on CMPA and make CMPA value increase at each 200kHz in order to have well distribuded trigger? Those will be done remaining time after my PID calculations.

This should be possible, with the impact of more SW overhead.

Gokhan G. said:

4) This is a basic question but I need to confirm again. Can ADC sample, hold and convert to digital process run behind without disturbing my ISR PID function? Can MCU have such parallel processing capacity as hardware inside? 

Correct, once the trigger is received from the PWM, the ADC will run in parallel sampling and converting the channel(s) desired.  You can also set up the DMA to read/copy the ADC result to a memory if you have any timing issues with servicing the ADC interrupt.

Best,

Matthew