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TMS320F28P650DK: Support in working with F28P650 C2000ware examples for PWM dead band generation which configures 6 modules in different dead band configurations

Part Number: TMS320F28P650DK
Other Parts Discussed in Thread: C2000WARE, SYSCONFIG

Team,

Our customer is working with f28p650's c2000ware examples for PWM dead band generation which configures 6 modules in different dead band configurations.

 From the example code, they are testing active high complementary mode on ePWM4 output which has the following dead band setting (400 and 200), but it results in complementary PWM with no dead band (see the scope shots attached herewith), can you please check the same. ?

 

Also, configuration of divide /2 for PWMclock in the clock tree results in PWM clock of 200.0 MHz (although it shows 100 MHz) and  divide/1 gives 100MHz, in sysconfig tool (1.17) can you please check the same.

 

 TY,

CY (for customer)

Thanks,

  • Hi Chris,

    Checking the shadow mode load enable for RED and FED fixes the problem with deadband generation.

    Rahul

  • Rahul

    Glad that you were able to resolve the issue

    Best Regards

    Siddharth

  • Yes, thanks for your efforts Rahul and updates.

    Per your offline message, if the PWM frequency is still an issue, let us know please.

    We will keep this thread open for the time being.

    Thank you again,

    Chris

  • Hi Chris and Rahul,

    To add on what Rahul had mentioned, the current SysConfig code generation using C2000Ware version 5.00.00.00, to enable Dead Band shadow load mode, make sure to check the checkbox for Enable RED Shadow Mode , and Enable FED Shadow Mode.

    In our next C2000Ware release we have updated the setting to correctly configure if dead band shadow load mode is DISABLED.

    Also, configuration of divide /2 for PWMclock in the clock tree results in PWM clock of 200.0 MHz (although it shows 100 MHz) and  divide/1 gives 100MHz, in sysconfig tool (1.17) can you please check the same.
    Let me double check on this with a colleague of mine and get back to you on this.
    Best,
    Ryan Ma

  • Chris, 

    I checked the clocktree .  It generates the code based on the value of EPWMCLKDIV and use the driverlib function SysCtl_setEPWMClockDivider () to set the clock for ePWM module.

    Please check device.c file and let me know if it changes when you select different values of divider.

    Regards,

    Hadi

  • Hi Hadi thanks for the reply,

    I think I know what is causing the problem, I checked the autogenerated code it sets value of 1 and 2 instead of 0 and 1 for divider of /1 and /2 respectively, see the code snap below.

    Also, I am using sysconfig tool (1.18.0+3266) in standalone mode to generate source files, meaning not using compiler time invocation.

    Also, noticed that in your autogenerated code input parameters are macros and my version it's constant values, do you know how to configure it to use macros ?


  • Hi Rahul,

    As you can see, the driverlib function is handling all using enums for EPWMCLKDivider.

    If you use C2000ware version 5, the macro is automatically generated.

    Regards,

    Hadi

  • Hadi, 

    Thanks for the reply, As you can see in the snap attached below the top of the .sysconfig file mentions that its save using c2000ware 5.0 version. But as I mentioned I am saving files manually using the tool and not using the cli invocation, not sure if that makes a difference.

      

  • Rahul,

    Sorry, we fixed this function after releasing version 5.

    To fix this, you need to replace the function SysCtl_setEPWMClockDivider()  in Asserts.xdt file in  your C2000ware directory: C2000Ware_5_00_00_00\driverlib\.meta\device\functions_c\Clocktree\  with the function given below: 

    SysCtl_setEPWMClockDivider(SYSCTL_EPWMCLK_DIV_`DEVICE_CLK_EPWM_DIV`);

      

    Regards,

    Hadi