Other Parts Discussed in Thread: TMS320F280039
I found the following issues when using timer interrupt and PWM interrupt in combination according to the 2800157 routine:
Background of the problem:
Use timer 0 to trigger a 20KHz interrupt, with the highest priority for timer interrupts and no other interrupts allowed; The event triggering submodule of EPWM2 triggers a 10KHz interrupt, allowing the timer to interrupt. The timer and EPWM module are enabled simultaneously, as shown in the attachment. The issue of interrupt nesting has been considered.
Problem phenomenon:
After several cycles, a certain cycle of the 10KHz interrupt suddenly decreased from 100us to 86us, and the cycles before and after this cycle were normal. After this cycle, the triggering time of the 10KHz interrupt was earlier than that of the timer interrupt. Waveform diagram can be found in the attachment
Question points:
1. What is the reason for the sudden reduction of 10KHz cycle caused by the combination of timer interrupt and PPWM interrupt? If we continue to use timer interrupts and PWM interrupts together, how can we avoid the problem of cycle reduction
2. The combination of timer interrupt and PWM interrupt reduces the PWM interrupt cycle. May I ask if the DSP280039 chip has the same problem? If so, how can I solve it
Question supplement:
1. Turn off the timer interrupt and reconfigure the interrupt. At this point, using EPWM1 to trigger a 20KHz interrupt and EPWM2 to trigger a 10KHz interrupt does not have the above issues
2. There are two official explanations given for the above phenomenon, and I have doubts about these two explanations:
Explanation 1: During the timer interrupt, an update or reload of the PWM module may have been triggered, resulting in a change in the status of the PWM timer. This will cause the PWM cycle to shorten or generate additional pulses
Question: If it causes the PWM module to reload, why is it only triggered once
Explanation 2: During the timer interrupt process, delays may occur in order to perform the operations required by the PWM module. This causes the trigger time of the PWM interrupt to be earlier than the timer interrupt, thereby shortening the cycle of the PWM interrupt.
Question: If the timer interrupt is delayed, it should be due to an increase in the timer interrupt cycle, a constant PWM interrupt cycle, and an increase in the PWM interrupt execution time, without causing a reduction in the PWM interrupt cycle.
Timer and EPWM enable simultaneously：
Interrupt waveform 1：
Interrupt waveform 2：
Interrupt waveform 3：
Please explain all the above issues. Additionally, we have also used TMS320F280039 in other projects. We would like to know if these issues are the same for 39. Thank you!
