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TMS320F28377D: How to configure dual CPU to boot from flash through cfg file?

Part Number: TMS320F28377D
Other Parts Discussed in Thread: C2000WARE

CCS 9.3.0

SYS/BIOS 6.46.05.55

How should the cfg files of the CPU1 and CPU2 projects be configured respectively so that the dual-core program can start by itself when it is powered on? Is it possible to achieve it by only configure the .cfg file without changing the code?

Does the cmd file need to be changed accordingly?

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Thanks & Regards

  •  Hello,

    Our expert on this topic is currently out of office and is expected to be back by 28th November. Please expect delay in response.

    Regards,

    Varsha

  • Hi Yale,

    Using that "Initiate boot of the CPU2 processor" option in the CPU1 cfg file will insert code during the SYS/BIOS CPU1 initialization to send a command to CPU2 to boot from Flash. From the CPU2 side, you need to make sure that code is placed at the flash entry point. If CPU2 is a SYS/BIOS application, the "Enable Boot from Flash" options should do this. If not, you'll use CodeStartBranch.asm like the C2000Ware examples do.

    More information about the F2837x Boot module options: software-dl.ti.com/.../index.html

    Whitney

  • Hi Whitney,

    The customer has set Boot.bootCPU2 and Boot.bootFromFlash in the cfg file of CPU1 to true, but both of the dual-core programs failed to start from flash. Are there any missing configurations? Prior to this, their individual CPU1 programs had been able to be booted from flash.

    cmd:

    In addition, after downloading the program, they can still click the resume button in CCS to run the program in the CPU. Does this mean that their configurations do not cause it to start from flash?

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    Thanks & Regards

  • Hi Yale,

    Are you saying that if they do a standalone boot from flash (disconnected from debugger) the application it does not boot, but if they do a debugger reset and run in CCS it works?

    Can you open up the .map files for both projects and confirm that an appropriate code start function is placed at the Flash entry point (0x80000)? Are both CPUs running SYS/BIOS or only CPU1?

    Whitney