This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28386D: TMS320F28386D

Part Number: TMS320F28386D
Other Parts Discussed in Thread: C2000WARE

Hello,

I've been working with a TI DSP and am having issues configuring the SCI Peripheral.  

The issue that I'm seeing is that the registers that I'm writing to are not actually changing.

I checked that the SCI B peripheral's clock is enabled.

Any assistance would be greatly appreciated. Code Below:

Thank You,

Dan Brescia

void init_SCI(void)
{
    ScibRegs.SCICTL1.bit.SWRESET        = holdReset;

    //Communication Control Register
    ScibRegs.SCICCR.bit.STOPBITS        = oneStopBit;
    ScibRegs.SCICCR.bit.PARITY          = evenParity; //Doesn't matter because it's disabled
    ScibRegs.SCICCR.bit.PARITYENA       = disableParity;
    ScibRegs.SCICCR.bit.LOOPBKENA       = disableLoopBack;
    ScibRegs.SCICCR.bit.ADDRIDLE_MODE   = pointToPointMode;
    ScibRegs.SCICCR.bit.SCICHAR         = eightBitsPerChar;

    //Control Register 1
    ScibRegs.SCICTL1.bit.RXERRINTENA    = disabledRxErrorInterrupt;
    ScibRegs.SCICTL1.bit.TXWAKE         = txSleep; //--DB Understand this bit better
    ScibRegs.SCICTL1.bit.SLEEP          = rxWake;
    ScibRegs.SCICTL1.bit.TXENA          = txDisable;
    ScibRegs.SCICTL1.bit.RXENA          = rxEnable;

    //Baud Rate
    int x = ( (calculateBaudRateClockDivider(desiredBaudRate, lowSpeedPeripheralClockRate) ) & 0xFF00) >> 8;
    ScibRegs.SCIHBAUD.bit.BAUD = x;
    int y =    (calculateBaudRateClockDivider(desiredBaudRate, lowSpeedPeripheralClockRate) ) & 0x00FF;
    ScibRegs.SCILBAUD.bit.BAUD = y;

    //Control Register 2
    ScibRegs.SCICTL2.bit.RXBKINTENA = rxDisableInterrupt;
    ScibRegs.SCICTL2.bit.TXINTENA   = txDisableInterrupt;

    //Tx FIFO Register
    ScibRegs.SCIFFTX.bit.SCIRST         = sciFIFOReset;
    ScibRegs.SCIFFTX.bit.SCIFFENA       = sciFIFODisable;
    ScibRegs.SCIFFTX.bit.TXFIFORESET    = txFIFOReset;
    ScibRegs.SCIFFTX.bit.TXFFIENA       = txFIFOInterruptDisabled;

    //Rx FIFO Register
    ScibRegs.SCIFFRX.bit.RXFIFORESET    = rxFIFORESET;
    ScibRegs.SCIFFRX.bit.RXFFIENA       = rxFIFOInterruptDisabled;

    //Auto-Baud Detection Register
    ScibRegs.SCIFFCT.bit.CDC    = autoBaudDetectAlignmentDisabled;

    //Debug Behaviour Register
    ScibRegs.SCIPRI.bit.FREESOFT = stopOnSuspend;

    ScibRegs.SCICTL1.bit.SWRESET        = releaseReset;
    return;
}

#include "f2838x_device.h"

#ifndef NAI_VPX_SCI_H_
#define NAI_VPX_SCI_H_


//SCI Communication Control Register (SCICCR) Macros
#define oneStopBit          (0x00)
#define evenParity          (0x00)
#define disableParity       (0x00)
#define disableLoopBack     (0x00)
#define pointToPointMode    (0x00)
#define eightBitsPerChar    (0x07)

//SCI Control Register 1 (SCICTL1) Macros
#define disabledRxErrorInterrupt    (0x00)
#define releaseReset                (0x01)
#define holdReset                   (0x00)
#define txSleep                     (0x00)
#define txWake                      (0x01)
#define rxWake                      (0x01)
#define txEnable                    (0x01)
#define txDisable                   (0x00)
#define rxEnable                    (0x01)
#define rxDisable                   (0x00)

//Baud Rate Calculation & Constants
#define lowSpeedPeripheralClockRate (50000000)  //50MHz
#define desiredBaudRate             (115200)    //115.2kHz

#define calculateBaudRateClockDivider(desiredBaud,LSPCLK) (((LSPCLK) / (8 * (desiredBaud))) - 1)

//SCI Control Register 1 (SCICTL1) Macros
#define rxDisableInterrupt  (0x00)
#define txDisableInterrupt  (0x00)

//SCI Tx FIFO Register (SCIFFTX) Macros
#define sciFIFOReset            (0x00)
#define sciFIFODisable          (0x00)
#define txFIFOReset             (0x00)
#define txFIFOInterruptDisabled (0x00)

//SCI Rx FIFO Register (SCIFFRX) Macros
#define rxFIFORESET             (0x00)
#define rxFIFOInterruptDisabled (0x00)

//Auto-Baud Detection Register
#define autoBaudDetectAlignmentDisabled (0x00)

//Debug Behaviour Register
#define stopOnSuspend   (0x00)

//Function Prototypes
void init_SCI(void);
void SCI_Machine(void);

  • Hi Dan,

    Does your code call InitSysCtrl() before writing to the registers? What did you use as a starting point for your code?

    Thanks,

    Delaney

  • Hi Delaney,

    Thank you for the reply.

    My code does call InitSysCtrl() as the first line of the void main(void).  The subroutine in my original question is only called later in the main's execution.

    It's worth noting that I'm adding SCI functionality to an existing project of mine and that I have other peripherals already working as expected such, I2C as an example.

    Thanks,

    Dan

  • Hi Dan,

    I took the sci_ex1_echoback example (from [C2000ware install]/device_support/f2838x/examples/cpu1/sci/) and replaced the sci_ex1_echoback.c file with the code you gave above (plus a call to InitSysCtrl()) and wasn't able to replicate the issue. Just to make sure, do you have continuous refresh toggled on in the Register view?

    Thanks,
    Delaney

  • Hi Delaney,

    Thank you again for your response.

    I just double checked and I do have continuous refresh toggled.

    I tried the same experiment as you described, by replacing the echoback.c with my code and I was able to see the registers updating on CPU1.  When I tried to debug on CPU2 I had issues getting out of the InitSysCtrl() subroutine. I guess because the example project is designed for CPU1.

    I should mention that I'm trying to control the SCI peripheral from CPU2 in my project.  Is there something I need to do on CPU1 to give CPU2 control of the SCI peripheral?

    Thank you,

    Dan Brescia

  • Hi Dan,

    Yes, in order to control the SCI peripheral on CPU2, add these lines to your code running on CPU1:

    EALLOW;
    DevCfgRegs.CPUSEL5.bit.SCI_B = 1;
    EDIS;

    This will transfer ownership of SCIB to CPU2. Make sure these lines are executed before the SCI peripheral clock is enabled on CPU2 (which is done in the InitSysCtrl() call on CPU2). Let me know if this fixes the problem, if not I can try to replicate on my end.

    Thanks,

    Delaney

  • Hi Delaney,

    Thank you so much, that fixed my problem!

    Regards,

    Dan Brescia