TMS320F28375D: If Flash test pin/external crystal pin connected to 3.3V

GR,

First, I would comment that any violation of the device DS, we cannot guarantee correct operation of the device.  Will a device, under nominal temperature and low frequencies appear to work?  It might, but we cannot take this to mean the device will meet the DS specs under all conditions when the DS is violated. 

With that said here is some additional information

GR said:

Q9 : 

If 21-pin (VDD 1.2V) will be unconnected, Device could operate nomally?

Q10 : 

If 61-pin (VDD 1.2V) will be unconnected, Device could operate nomally?

No, device operation will not be normal.  The reason that there are multiple VDD(and VDDIO) pins for our devices is to ensure that the voltages are maintained across the device, when there are some pins that are left floating there will be a local voltage droop caused by current demand that will result in some logic being under powered

GR said:

Q11 : 

If 20-pin (VDDIO 3.3V) will be unconnected, Device could operate nomally?

Q12 : 

If 26-pin (VDDIO 3.3V) will be unconnected, Device could operate nomally?

Q13 : 

If 68-pin (VDDIO 3.3V) will be unconnected, Device could operate nomally?

Same as above

GR said:

Q14 : 

If 73-pin (Flash Power 3.3V) will be unconnected, Only Flash will not operate?

In theory, yes, but as you mentioned the BootROM uses OTP settings for trims and to determine any user boot mode, so I would expect this to fail somewhat quickly when that

happens.

GR said:

Q1 : 

I think FLT1(73-pin) must be unconnected.

But, If connected to 3.3V Before POR, Device will be operation nomally?

Q2 : 

If FLT1(73-pin) connected to 3.3V during CPU operating, Device will be operation nomally?

Q3 : 

I think FLT2(74-pin) must be unconnected.

But, If connected to 3.3V Before POR, Device will be operation nomally?

Q4 : 

If FLT2(74-pin) connected to 3.3V during CPU operating, Device will be operation nomally?

Q5 : 

If FLT1(73-pin) connected to FLT2(74-pin) before POR, Device will be operation nomally?

Q6 : 

If FLT1(73-pin) connected to FLT2(74-pin) during CPU operating, Device will be operation nomally?

The DS needs to be followed here, i.e. leave both of these unconnected. 

For the Q1 and Q3 are we saying that these pins will have 3.3V before the device VDDIO has 3.3V or just before the POR is released?

I think, in general, the device will operate normally if the above happens, but it is not ideal

GR said:

Q7 : 

If X2(121-pin) connected to 3.3V before POR, Device will be operation nomally?

Q8 : 

If X2(121-pin) connected to 3.3V during CPU operating, Device will be operation nomally?

Same question as above for Q7, but Q8 this will definitely be an issue.  X2 is the logical complement to X1, if this is driven at all, it will interfere with the clock signal into the device.  Only time X2 is connected is for a quartz crystal connection with it and X1.  If clock is single ended to X1, X2 should be unconnected.

Best,

Matthew