Part Number: SFRA
Hello experts
i am writing a new code for doing SFRA & following the steps given in C2000 Software Frequency Response Analyzer (SFRA) Library User’s Guide (Rev. A) (ti.com)
when calling SFRA_F32_config, i am getting some error & not able to resolve it. i am not finished writing the code completely. but feel this erro not becuase of that. kindly help
the errors are
#167: too few arguments in function call
#18: expected a ")"
the code is given below, kindly help
Regards
Anoop

#include "f28x_project.h"
#include "driverlib.h"
#include "device.h"
#include "sfra_f32.h"
#ifndef NULL
#define NULL ((void *)0x0)
#endif
#define SFRA_ISR_FREQ 100e3
#define SFRA_FREQ_START 2
#define SFRA_FREQ_STEP_MULTIPLY ((float32_t)1.105)
#define SFRA_AMPLITUDE ((float32_t)0.005)
#define SFRA_FREQ_LENGTH 100
SFRA_F32 sfra1;
float32_t plantMagVect[SFRA_FREQ_LENGTH];
float32_t plantPhaseVect[SFRA_FREQ_LENGTH];
float32_t olMagVect[SFRA_FREQ_LENGTH];
float32_t olPhaseVect[SFRA_FREQ_LENGTH];
float32_t clMagVect[SFRA_FREQ_LENGTH];
float32_t clPhaseVect[SFRA_FREQ_LENGTH];
float32_t freqVect[SFRA_FREQ_LENGTH];
extern long FPUsinTable[];
__interrupt void epwm1_isr(void);
void PWM_Config(void);
void main(void)
{
InitSysCtrl();
CpuSysRegs.PCLKCR2.bit.EPWM1=1;
InitEPwm1Gpio();
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
EALLOW;
PieVectTable.EPWM1_INT = &epwm1_isr;
EDIS;
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =0;
EDIS;
PWM_Config();
EALLOW;
CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1;
EDIS;
IER |= M_INT3;
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
EINT;
ERTM;
//Resets the internal data of sfra module to zero
SFRA_F32_reset(&sfra1);
//Configures the SFRA module
SFRA_F32_config(&sfra1,
SFRA_ISR_FREQ,
SFRA_AMPLITUDE,
SFRA_FREQ_LENGTH,
SFRA_FREQ_START,
SFRA_FREQ_STEP_MULTIPLY,
plantMagVect,
plantPhaseVect,
olMagVect,
olPhaseVect,
clMagVect,
clPhaseVect
freqVect,
1);
//Resets the response arrays to all zeroes
SFRA_F32_resetFreqRespArray(&sfra1);
// Initializes the frequency response array
SFRA_F32_initFreqArrayWithLogSteps(&sfra1,
SFRA_FREQ_START,
SFRA_FREQ_STEP_MULTIPLY);
for(;;)
{
}
}
__interrupt void epwm1_isr(void)
{
EPwm1Regs.ETCLR.bit.INT = 1;
PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
}
void PWM_Config()
{
EPwm1Regs.TBPRD = 500;
EPwm1Regs.TBPHS.bit.TBPHS = 0x0000;
EPwm1Regs.TBCTR = 0x0000;
EPwm1Regs.TBCTL.bit.CTRMODE = 2;
EPwm1Regs.TBCTL.bit.PHSEN = 0;
EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;
EPwm1Regs.TBCTL.bit.CLKDIV = 0;
EPwm1Regs.CMPCTL.bit.SHDWAMODE = 0;
EPwm1Regs.CMPCTL.bit.SHDWBMODE = 0;
EPwm1Regs.CMPCTL.bit.LOADAMODE = 0;
EPwm1Regs.CMPCTL.bit.LOADBMODE = 0;
EPwm1Regs.CMPA.bit.CMPA = 150;
EPwm1Regs.AQCTLA.bit.CAU = 2;
EPwm1Regs.AQCTLA.bit.CAD = 1;
EPwm1Regs.DBCTL.all = 0x800B;
EPwm1Regs.DBRED.bit.DBRED = 50;
EPwm1Regs.DBFED.bit.DBFED = 50;
EPwm1Regs.ETSEL.bit.INTSEL = 1;
EPwm1Regs.ETSEL.bit.INTEN = 1;
EPwm1Regs.ETPS.bit.INTPRD = 1;
}
