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TMS320F28388S: ADC zero offset under different temperature

Part Number: TMS320F28388S


Hi,

Customer is asking for some data about ADC zero offset under different junction/ambient temperature.

They'd like to calibrate it under different temperature. Do we have these kind of data?

For each ADC, there's pin to connect to AGND internally. It can be used to calculate it, although.

Thanks a lot.

Br, Jordan

  • Hi Jordan,

    We have not seen a huge dependence of ADC offset with temperature.  The ADC offset measured at ambient temperature conditions is applicable across temperature.  As you stated, there is access for AGND to be connected and sampled by each ADC module for offset calculations if they wish to determine the offsets.  The steps to do this is detailed in the TRM.

    Regards,

    Joseph

  • Joseph,

    Thanks. 

    Some other doubt:

    1) 16-bit differential mode is used, what's the logic for zero offset calibration?  UG explains as below. Normally, in different ambient temperature, whta's the range of zero offset error? If typical is +/-9 LSB for 25C, what's it for 85C?

    Use the following procedure to re-calibrate the ADC offset in 16-bit, differential mode:
    1. Set ADCOFFTRIM to no adjustment (0x00).
    2. Short ADCINxP and ADCINyN together (external connection) to a voltage near Vrefcm and accumulate some multiple of 16 conversions (e.g. 32*16 conversions = 512 conversions).
    3. Divide the accumulated result by the number of conversions (for example, for 512 conversions, divide by 512).
    4. Set ADCOFFTRIM to 0 – result from step 3).

    2) Beside the zero offset, there's also gain and linearity error. What about the relationship between gain and linearity error and temperature?  My point of view, gain error varies low in different temperature. 

    In customer's case, when the temperature increases, the ADC result error becomes larger. Currently, OTP trim values for offset and linearity are called. 

    Thanks a lot.

    Br, Jordan

  • Hi Jordan,

    Please see responses below:

    1) 16-bit differential mode is used, what's the logic for zero offset calibration?  UG explains as below. Normally, in different ambient temperature, whta's the range of zero offset error? If typical is +/-9 LSB for 25C, what's it for 85C?

    JC: The typical values indicated in the datasheet cover the temperature range that is specified for the device, which is from -40C to 125C.

    Use the following procedure to re-calibrate the ADC offset in 16-bit, differential mode:
    1. Set ADCOFFTRIM to no adjustment (0x00).

    JC: For differential input, there are two channels required, a positive channel and a negative channel and these channels have to be adjacent to each other.  In UG, the valid combinations of adjacent positive and negative inputs are indicated in Table 20-6 (Channel Selection of Input Pins).  Differential signals for positive and negative inputs, when added has to equal VREFHI value.  For instance, if VREFHI chosen is 2.5V and ADCINP is at 2.0V, then ADCINM has to be 0.5V.  This condition has to be met at all times.  See section 7.11.2.2.1 (Signal Mode) in the datasheet for the illustration.  For the zero offset calibration steps for differential mode signaling as described in the UG, connecting ADCINP and ADCINM to VREFCM would produce an equivalent input that is midscale (half of VREFHI + offset errors from the system).  The offset procedure calls for doing multiple conversions in order to capture more variations, if any in the conversions and averaging them out later.

    2) Beside the zero offset, there's also gain and linearity error. What about the relationship between gain and linearity error and temperature?  My point of view, gain error varies low in different temperature. 

    JC: Like offset correction, linearity calibration which is performed during factory testing is intended across temperature range of the device.  There are no linearity calibrations needed at lower or higher temperatures.  F28388s device does not have gain error correction.  Gain error is largely dependent on how accurate the VREFHI source is.  For example, if VREFHI source has 0.05% error (2.5+/-1.25mV), then same error will propagate at the ADC contributing to about 32LSB of gain error.

    In your customer's case, which error gets worse at increased temperature?  Is the entire system (assembly+passive parts +reference circuits...etc) heated up?  Did you get to check for other items like if they have enough sampling time?

    Hope above info helps for debugging your customer issues.  Let me know if there are other questions.

    Best regards,

    Joseph