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TMS320F2800157: Need more detail description for lockstep function

LIU LIU
Intellectual 390 points
Part Number: TMS320F2800157
Other Parts Discussed in Thread: C2000WARE

From TRM of LCM section. 

I feel that I don not get enough information to use it. Do you have more detailed document for lockstep function？

  • 0
    TI__Mastermind 19795 points

    Hi Liu Liu,

    Thanks for your question. Have you looked at the "C2000Ware\driverlib\f280015x\driverlib\lcm.h" and "lcm.c" files in C2000Ware? These have functions that walk through how to use the peripheral.

    Regards,

    Vince

  • 0 in reply to Vince
    Intellectual 390 points

    1. The note under figure 3-1 in your TRM, it said the primary/secondary module of  can be either a CPU or a peripheral, so where can I set the primary/secondary module of LCM?

    2. Section3.1.1 said LCM has pipelined architecture.  Is LCM pipeline architecture correspond with the pipeline architecture of the CPU? 

        From SPRU430F, I know TI CPU has eight pipeline stage. For example, If there is different in the 3rd stage between primary/secondary CPU, will LCM  detect these different immediately in its corresponding architecture？ Or the LCM just monitor the IO of the CPU(such as databus?) and the different in the 3rd stage between primary/secondary CPU will be detected by LCM only when IO of CPU is different? 

    3. In section 7.11 of databook, it said  C2000 Safety Package for Automotive and Industrial Real-Time Microcontrollers User's Guide has some more information of LCM self test. But I don't know which article should I refer in these user guide.

  • +1 in reply to LIU LIU
    TI__Mastermind 19795 points
    LIU LIU said:
    1. The note under figure 3-1 in your TRM, it said the primary/secondary module of  can be either a CPU or a peripheral, so where can I set the primary/secondary module of LCM?

    LIU LIU said:
    Is LCM pipeline architecture correspond with the pipeline architecture of the CPU? 

    Yes, this is just another redundant core to verify the first core's output is correct.

    LIU LIU said:
    If there is different in the 3rd stage between primary/secondary CPU, will LCM  detect these different immediately in its corresponding architecture？

    The LCM is only meant to compare the output of the core, not the individual pipeline stages in between.

    LIU LIU said:
    C2000 Safety Package for Automotive and Industrial Real-Time Microcontrollers User's Guide has some more information of LCM self test. But I don't know which article should I refer in these user guide.

    The two highlighted items below show the available safety collateral for F280015x

    Regards,

    Vince

  • 0 in reply to Vince
    Intellectual 390 points

    1.Figure3-1 in TRM is blew. I what to know, how can I choose the primary/secondary module (like DMA)? Or the  primary/secondary module is just CPU?

  • 0 in reply to LIU LIU
    TI__Mastermind 19795 points

    Hi Liu,

    There is no DMA on F280015x, it is mentioned as a general statement for all devices with LCM, where the DMA may have a redundant module too (no devices exist with this at this time). The only LCM option that is available on F280015x is the CPU.

    Regards,

    Vince

  • 0 in reply to Vince
    Intellectual 390 points

    From TRM section 3.5.1 I know redundant comparator block and it enables availability of one comparator block during self-test of the other comparator block. 

    I want further know that will the redundant comparator undergo self-test when LCM_CONTROL.STEN = 1?

    Or the redundant comparator is just to monitor the CPU when comparator1 in self-test?

  • 0 in reply to LIU LIU
    TI__Mastermind 19795 points

    LIU LIU said:
    Or the redundant comparator is just to monitor the CPU when comparator1 in self-test?

    Please read the Match Test Mode and Mismatch Test Mode sections of the TRM. These directly explain how each redundant comparator is used during the test.

  • 0 in reply to Vince
    Intellectual 390 points
    Vince said:
    Please read the Match Test Mode and Mismatch Test Mode sections of the TRM. These directly explain how each redundant comparator is used during the test.

    So can I thinks that LCM only use comparator1 in function mode?

    For the comparator2, It is used to monitor the primary/secondary CPU during comparator1 is in self test. when comparator1 complete the self-test, the comparator2 begin self-test and comparator1 is used to monitor the primary/secondary CPU.

  • +1 in reply to LIU LIU
    TI__Mastermind 19795 points
    LIU LIU said:

    So can I thinks that LCM only use comparator1 in function mode?

    For the comparator2, It is used to monitor the primary/secondary CPU during comparator1 is in self test. when comparator1 complete the self-test, the comparator2 begin self-test and comparator1 is used to monitor the primary/secondary CPU.

    This is correct.