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TMS320F280049C: can SPISTE pin be pulled high between each words transmission when operates in FIFO mode

Yale Li 李耀先
Expert 4660 points
Part Number: TMS320F280049C
Other Parts Discussed in Thread: TLV5630

Hi Team,

My customer is using F280049C to communicate with TLV5630. And he wants to put C2000's SPI peripheral in FIFO mode.

This is the timing description of TLV5630:

I cannot find the related description in F280049C's TRM when operates SPI in FIFO mode.

Is this timing possible in F280049C SPI FIFO mode?

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Thanks & Regards

  • 0
    TI__Mastermind 23900 points

    Hi Yale,

    Yes, this is possible to achieve. There is a note in the F28004x datasheet that "On the trailing end of the word, SPISTE will go inactive except between back-to-back transmit words in both FIFO and non-FIFO modes." In other words, the SPISTE should go high in between words unless you transmit words all in a row (which would cause the SPISTE to remain low during all back-to-back word transmissions and then go high once all transmissions are complete).

    The specific timing of the behavior of SPISTE (when SPISTE goes low and when it goes high again) is dependent on factors such as SPI freq and BRR - the most relevant specifications to pay attention to here are the "Delay time, SPISTE valid to SPICLK" and "Delay time, SPICLK to SPISTE invalid". Please see datasheet section 7.12.5.1 SPI Electrical Data and Timing for more details/diagrams, and please let me know if you have further questions!

    Best Regards,

    Allison