TMS320F28P650DK: SDFM: Access protection is triggered when CLA writes sdfm registers

Hi Shawn,

Can you try making the following change to your linker cmd file, example '28p65x_SDFM_cla_ram_lnk_cpu1.cmd' if using RAM config:

   /* The following section definition are for SDFM examples */
//   Filter1_RegsFile : > RAMLS7
//   Filter2_RegsFile : > RAMLS7
//   Filter3_RegsFile : > RAMLS8
//   Filter4_RegsFile : > RAMLS8
   Filter1_RegsFile : > RAMLS8_CLA
   Filter2_RegsFile : > RAMLS8_CLA
   Filter3_RegsFile : > RAMLS9_CLA
   Filter4_RegsFile : > RAMLS9_CLA

I think the issue is that LS8 RAM location currently being used is not mapped to CLA. If this works please let me know so we can fix the software bug.

Best,

Kevin

Hi, Kevin,

I modified the cmd file, and found both CLA1WRITE and CPUWRITE flag were set.

I checked the address mapping of 28P65 and found a very confusing problem that LS8 & LS9 RAM mapping overlaps with the addresses of peripheral registers (e.g. sdfm registers). There are two further scenarios:

1. If I assign LS8_9 to CLA and want CLA to read and write peripheral registers, it looks like there will be a conflict;

2. If I assign LS8_9 to the CPU and expect CLA to read and write peripheral registers, then when CLA accesses those addresses, it triggers an access violation

Does this mean that no matter how I allocate LS8_9, there will be conflicts when CLA accesses peripheral registers? How should I configure myself to avoid such conflicts?

Regards,

Shawn

Hi Shawn,

ShawnYu said:

I checked the address mapping of 28P65 and found a very confusing problem that LS8 & LS9 RAM mapping overlaps with the addresses of peripheral registers (e.g. sdfm registers). There are two further scenarios:

I think there is a reason for this overlap, but need to check with another expert.

ShawnYu said:

Does this mean that no matter how I allocate LS8_9, there will be conflicts when CLA accesses peripheral registers? How should I configure myself to avoid such conflicts?

For the time being can you try using non-conflicting LSx sections? Like LS6 and LS7.

Best,

Kevin

Hi Shawn,

I checked with another expert and it should work with LS8_9 being mapped to the CLA. Can you check if the CLA1_ACC in SDFMx_AC registers are enabled?

Best,

Kevin

Hi Kevin,

As customer can reproduce the issue in our demo 'sdfm_ex2_filter_sync_claread', could you look into it to see if it is a bug? The 'access violation' happens not only in SDFM, but also in other peripherals. Although there is 'access violation', the write operation of the CLA to peripherals was performed successfully. Is it mean that we can ignore ' access violation'? Thanks for your help in advance.

Hi Angela,

I will look into this, but we may need to reach out to another expert about this.

Best Regards,

Ben Collier

-- Edited the post

Hi Angela,

We are looking into this and will provide you update early next week.

Regards,

Vivek Singh

Hi Angela,

We do not see any issue  in design. Would it be possible for you to send us the sample code to reproduce this issue at our end ?

Vivek Singh