TMS320F280039C: SCI hit EFT work abnormal

I will get back to you with a response to this tomorrow, sorry for the delay.

Best Regards,

Delaney

That's okay!

After your problems I do the test found that when playing EFT   ScibRegs. SCIRXST. Bit. RXERROR = 1, and RXFFOVF = 1, should be a parity error, when I find the reason, I will SWRESET = 0; RXFFOVRCLR =1; RXFIFORESET =0; After that, the fault is gone, but the data received by FIFO is always wrong, now the problem point is here,

thank you

To clarify, are you trying to: 

1. receive encoder data,
2. have the EFT event occur,
3. reset SCI communication when the EFT event causes errors in received data,
4. then receive data from the encoder correctly again?

Before any EFT event, is encoder data correctly received by the F280039C?

The code in the red box for the reset sequence looks correct. Please try adding the below lines of code afterwards to reset both the RX and TX channels:

ScibRegs.SCIFFTX.bit.SCIRST = 0;

ScibRegs.SCIFFTX.bit.SCIRST = 1;

Best Regards,

Delaney

Delaney Woodward said:

• receive encoder data,
• have the EFT event occur,
• reset SCI communication when the EFT event causes errors in received data,
• then receive data from the encoder correctly again?

Yes!

Delaney Woodward said:

Before any EFT event, is encoder data correctly received by the F280039C?

Yes！It works.

Delaney Woodward said:

The code in the red box for the reset sequence looks correct. Please try adding the below lines of code afterwards to reset both the RX and TX channels:

ScibRegs.SCIFFTX.bit.SCIRST = 0;

ScibRegs.SCIFFTX.bit.SCIRST = 1;

Ok, but I am busy with another project today, and I will be free tomorrow. I will contact you after I try

Thank you very much for your help！Delaney

Sounds good, let me know if this fixes the issue. If not, please provide current oscilloscope captures of the data received before and after the EFT event. I would also recommend using the RX ERROR interrupt to detect this case and performing the resets inside the ISR if you are not already doing so.

Best Regards,

Delaney

I tried it again today and it worked but not completely. Sometimes the encoder data can be read normally after an error, and sometimes the data is disordered

I recorded two videos, one normal and one abnormal. The P18.34 parameter in the video is the number of motor turns of the encoder read back.

normal

abnormal

if(ScibRegs.SCIRXST.bit.RXERROR == 1)
    {
        fParaAll.para.rsvd1204 = ScibRegs.SCIFFRX.bit.RXFFOVF;
        fParaAll.para.rsvd1205  = ScibRegs.SCIRXST.bit.RXERROR;
        ScibRegs.SCICTL1.bit.SWRESET = 0; //复位SCIB
        ScibRegs.SCICTL1.bit.SWRESET = 1;
        ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 1;
        ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 0;
        ScibRegs.SCIFFRX.bit.RXFIFORESET=0;       //复位FIFO指针为0
        ScibRegs.SCIFFRX.bit.RXFIFORESET=1;       //重新启用FIFO
        ScibRegs.SCIFFTX.bit.SCIRST = 0;
        ScibRegs.SCIFFTX.bit.SCIRST = 1;
        for(i=0;i<16;i++)
            FIFObufValue[i] = ScibRegs.SCIRXBUF.all & 0x00ff;
        RXERRORFlag =1;
        fParaAll.para.rsvd1206 = ScibRegs.SCIFFRX.bit.RXFFOVF;
        fParaAll.para.rsvd1207  = ScibRegs.SCIRXST.bit.RXERROR;
    }

As for the encoder communication waveform you mentioned, I have sent it above. I am sending a read command to the encoder every 125us in 8K carrier interrupts.

It might be that the encoder hasn't finished sending all of the previous 11 bytes by the time the SCI reset is done, and the leftover data is then received in the middle of a byte (which would cause the framing and break detect errors). If this is the case, my suggestion would be to have a global flag that gets set when the EFT event takes place and ignore all data received when it is set. Then, clear this flag when you are about to send the next read command to the encoder. This way you can ensure that data being received after the EFT event is new and read in correctly. 

Let me know if this fixes the issue. 

Best Regards,

Delaney

The situation you mentioned is really something I did not consider before. What I do now is that when the first failure occurs, I reset the SCI and stop sending read instructions to the encoder (meaning that the encoder will not return data). After 10 carrier cycles (125us*10=11.25ms), I will reset the SCI again, in order to clear the remaining part of the 11 bytes in the first failure (my understanding is that when the 11 bytes are transmitted, suppose the fifth byte is interrupted by interference and then reset the SCI, However, the remaining 6 bytes will be rereceived after SCI reset, resulting in out-of-order FIFO).

Following the above practice can solve the problem of reading the encoder data again after the fault is reported. However, I have tested to shorten the 10 cycles and found that it is not possible, which means that I need to wait for 10 carrier cycles to read the encoder data normally after SCI reset after fault alarm. I don't know why?

If you have any ideas, let me know and I'll test them out

Thank you very much for your help,Delaney.

void ReadEncoder_SendCMD_start(void)
{
    static Uint16 SW_times =0;
    static Uint16 RXERRORFlag =0;
    Uint16 i=0;
    //Uint16 FIFObufValue[16]={0};

    if(ScibRegs.SCIRXST.bit.RXERROR == 1)
    {
        ScibRegs.SCICTL1.bit.SWRESET = 0; //复位SCIB
        ScibRegs.SCICTL1.bit.SWRESET = 1;
        ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 1;
        ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 0;
        ScibRegs.SCIFFRX.bit.RXFIFORESET=0;       //复位FIFO指针为0
        ScibRegs.SCIFFRX.bit.RXFIFORESET=1;       //重新启用FIFO
        ScibRegs.SCIFFTX.bit.SCIRST = 0;
        ScibRegs.SCIFFTX.bit.SCIRST = 1;
        RXERRORFlag =1;
    }

    if(RXERRORFlag == 1)
    {    
        SW_times++;   
        if(SW_times>=10)   //发现故障之后连续10次不发送指令
        {
            ScibRegs.SCICTL1.bit.SWRESET = 0; //复位SCIB
            ScibRegs.SCICTL1.bit.SWRESET = 1;
            ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 1;
            ScibRegs.SCIFFRX.bit.RXFFOVRCLR = 0;
            ScibRegs.SCIFFRX.bit.RXFIFORESET=0;       //复位FIFO指针为0
            ScibRegs.SCIFFRX.bit.RXFIFORESET=1;       //重新启用FIFO
            ScibRegs.SCIFFTX.bit.SCIRST = 0;
            ScibRegs.SCIFFTX.bit.SCIRST = 1;
            SW_times =0;
            RXERRORFlag =0;
        }    
    }
    else
    {
        ReadEncoder_WriteRTS(0);          
        ScibRegs.SCITXBUF.all = 0x1A;        //Read data instruction
    }
    TimeRecord1 = EPwm5Regs.TBCTR;    
}

After the initial SCI reset:

• If you monitor the RXFFST register, does it show more data shifting into the RX FIFO? 
• Are you getting any framing or break detect errors?
• Is it possible to also reset the encoder so that it immediately stops sending data?

Best Regards,

Delaney