TMS320F28388D: The API to power down Ethernet PHY.

Discussion moved offline. Suggestions provided:

Believe this is possible by writing to PHY register BMCR bit[11] and maybe also DPDWN bit[2] if they want to go into Deep Power Down.

If you need PHY register read / write functions using MII interface you can leverage the functions below. Note that these functions are for the C28 core, slightly modified functions would be needed for CM core (8-bit byte addressable).

Function Declarations:

//
// Functions for reading / writing to DP838xx PHY devices
//
#define ESC_MII_CTRL_STATUS_OFFSET          0x0510 // 0x288 - Low
#define ESC_PHY_ADDRESS_OFFSET              0x0512 // 0x289 - Low
#define ESC_PHY_REG_ADDRESS_OFFSET          0x0513 // 0x289 - High
#define ESC_PHY_DATA_OFFSET                 0x0514 // 0x28A - Low
#define ESC_MII_ECAT_ACCESS_OFFSET          0x0516 // 0x28B - Low
#define ESC_MII_PDI_ACCESS_OFFSET           0x0517 // 0x28B - High

//
// Function for reading from an ESC PHY register using CPU1 -
//      Assumes Word and address are 16-bit values
//
uint16_t mii_readPhyRegister(uint16_t address, uint16_t target_phy_address)
{
    // Set PHY address to read/write, (0x0513//0x289 HIGH byte)
    ESC_writeWordISR((address<<8) | target_phy_address, ESC_PHY_ADDRESS_OFFSET);

    // Write PHY reg, (0x0510//0x288 low)
    ESC_writeWordISR(0x0103,ESC_MII_CTRL_STATUS_OFFSET);

    while(ESC_readWordISR(ESC_MII_CTRL_STATUS_OFFSET) != 0x3); // wait till read is completed and successful

    return ESC_readWordISR(ESC_PHY_DATA_OFFSET);
}

//
// Function for writing to an ESC PHY register using CPU1 -
//      Assumes Word and address are 16-bit values
//
void mii_writePhyRegister(uint16_t address, uint16_t target_phy_address, uint16_t data)
{
    // Set PHY address to read/write, (0x0513//0x289 HIGH byte)
    ESC_writeWordISR((address<<8) | target_phy_address, ESC_PHY_ADDRESS_OFFSET);
    ESC_writeWordISR(data, ESC_PHY_DATA_OFFSET);
    ESC_writeWordISR(0x203, ESC_MII_CTRL_STATUS_OFFSET);

    while(ESC_readWordISR(ESC_MII_CTRL_STATUS_OFFSET) != 0x3); // wait till write is completed and successful
}

//
// Function for reading from an Extended ESC PHY register using CPU1 -
//      Assumes Word and address are 16-bit values
//
uint16_t mii_readPhyExtendedRegister(uint16_t address, uint16_t target_phy_address)
{
    mii_writePhyRegister(0xD, target_phy_address, 0x1F); //Phy reg 0xD = 0x1F
    mii_writePhyRegister(0xE, target_phy_address, address); //Phy Reg 0xE = *Address of register outside of 0-1F
    mii_writePhyRegister(0xD, target_phy_address, 0x401F); //Phy reg 0xD = 0x401F

    return(mii_readPhyRegister(0xE,target_phy_address)); // Extended read data
}

void enable_PDI_access_to_MII(void)
{
    ESC_writeWordISR(0x0100,ESC_MII_ECAT_ACCESS_OFFSET); // Give PDI access to MII management

    return;
}

uint16_t phy_regs_0[32];      // For storing first 32 PHY registers of Port0
uint16_t ext_phy_regs_0[48];  // For storing Extended PHY registers of Port0

uint16_t phy_regs_1[32];      // For storing first 32 PHY registers of Port1
uint16_t ext_phy_regs_1[48];  // For storing Extended PHY registers of Port1

Usage of Functions:

    //
    // Initialize ESCSS Memory
    //
    ESCSS_initMemory(ESC_SS_BASE);

    //
    // Wait for ESCSS memory initialization to complete
    //
    if(ESCSS_getMemoryInitDoneStatusBlocking(ESC_SS_BASE, memoryTimeOut) !=
       ESCSS_API_SUCCESS)
    {
        return(ESC_HW_INIT_FAIL);
    }

    ESTOP0;

    // Read PHY registers...
    enable_PDI_access_to_MII();

    DEVICE_DELAY_US(100);

    uint16_t index;

    //
    // Read Port0 PHY Registers
    //

    // Read first 32 PHY registers (non-extended)
    for (index = 0; index < 32; ++index)
    {
        phy_regs_0[index] = mii_readPhyRegister(index, 0x00);
    }

    DEVICE_DELAY_US(100);

    // Read extended PHY registers
    ext_phy_regs_0[0] = mii_readPhyRegister(0x25, 0x00);
    ext_phy_regs_0[1] = mii_readPhyRegister(0x27, 0x00);
    ext_phy_regs_0[2] = mii_readPhyRegister(0x2A, 0x00);
    ext_phy_regs_0[3] = mii_readPhyRegister(0x117, 0x00);
    ext_phy_regs_0[4] = mii_readPhyRegister(0x131, 0x00);
    ext_phy_regs_0[5] = mii_readPhyRegister(0x170, 0x00);
    ext_phy_regs_0[6] = mii_readPhyRegister(0x171, 0x00);
    ext_phy_regs_0[7] = mii_readPhyRegister(0x173, 0x00);
    ext_phy_regs_0[8] = mii_readPhyRegister(0x175, 0x00);
    ext_phy_regs_0[9] = mii_readPhyRegister(0x176, 0x00);
    ext_phy_regs_0[10] = mii_readPhyRegister(0x177, 0x00);
    ext_phy_regs_0[11] = mii_readPhyRegister(0x178, 0x00);
    ext_phy_regs_0[12] = mii_readPhyRegister(0x180, 0x00);
    ext_phy_regs_0[13] = mii_readPhyRegister(0x181, 0x00);
    ext_phy_regs_0[14] = mii_readPhyRegister(0x182, 0x00);
    ext_phy_regs_0[15] = mii_readPhyRegister(0x183, 0x00);
    ext_phy_regs_0[16] = mii_readPhyRegister(0x184, 0x00);
    ext_phy_regs_0[17] = mii_readPhyRegister(0x185, 0x00);
    ext_phy_regs_0[18] = mii_readPhyRegister(0x186, 0x00);
    ext_phy_regs_0[19] = mii_readPhyRegister(0x187, 0x00);
    ext_phy_regs_0[20] = mii_readPhyRegister(0x188, 0x00);
    ext_phy_regs_0[21] = mii_readPhyRegister(0x189, 0x00);
    ext_phy_regs_0[22] = mii_readPhyRegister(0x18A, 0x00);
    ext_phy_regs_0[23] = mii_readPhyRegister(0x302, 0x00);
    ext_phy_regs_0[24] = mii_readPhyRegister(0x303, 0x00);
    ext_phy_regs_0[25] = mii_readPhyRegister(0x304, 0x00);
    ext_phy_regs_0[26] = mii_readPhyRegister(0x305, 0x00);
    ext_phy_regs_0[27] = mii_readPhyRegister(0x306, 0x00);
    ext_phy_regs_0[28] = mii_readPhyRegister(0x308, 0x00);
    ext_phy_regs_0[29] = mii_readPhyRegister(0x30B, 0x00);
    ext_phy_regs_0[30] = mii_readPhyRegister(0x30C, 0x00);
    ext_phy_regs_0[31] = mii_readPhyRegister(0x30E, 0x00);
    ext_phy_regs_0[32] = mii_readPhyRegister(0x404, 0x00);
    ext_phy_regs_0[33] = mii_readPhyRegister(0x40D, 0x00);
    ext_phy_regs_0[34] = mii_readPhyRegister(0x456, 0x00);
    ext_phy_regs_0[35] = mii_readPhyRegister(0x460, 0x00);
    ext_phy_regs_0[36] = mii_readPhyRegister(0x461, 0x00);
    ext_phy_regs_0[37] = mii_readPhyRegister(0x467, 0x00);
    ext_phy_regs_0[38] = mii_readPhyRegister(0x468, 0x00);
    ext_phy_regs_0[39] = mii_readPhyRegister(0x469, 0x00);
    ext_phy_regs_0[40] = mii_readPhyRegister(0x4A0, 0x00);
    ext_phy_regs_0[41] = mii_readPhyRegister(0x4A1, 0x00);
    ext_phy_regs_0[42] = mii_readPhyRegister(0x4A2, 0x00);
    ext_phy_regs_0[43] = mii_readPhyRegister(0x4A3, 0x00);
    ext_phy_regs_0[44] = mii_readPhyRegister(0x4A4, 0x00);
    ext_phy_regs_0[45] = mii_readPhyRegister(0x4A5, 0x00);
    ext_phy_regs_0[46] = mii_readPhyRegister(0x4A6, 0x00);
    ext_phy_regs_0[47] = mii_readPhyRegister(0x4A7, 0x00);

    //
    // Read Port1 PHY Registers
    //

    // Read first 32 PHY registers (non-extended)
    for (index = 0; index < 32; ++index)
    {
        phy_regs_1[index] = mii_readPhyRegister(index, 0x01);
    }

    DEVICE_DELAY_US(100);

    // Read extended PHY registers
    ext_phy_regs_1[0] = mii_readPhyRegister(0x25, 0x01);
    ext_phy_regs_1[1] = mii_readPhyRegister(0x27, 0x01);
    ext_phy_regs_1[2] = mii_readPhyRegister(0x2A, 0x01);
    ext_phy_regs_1[3] = mii_readPhyRegister(0x117, 0x01);
    ext_phy_regs_1[4] = mii_readPhyRegister(0x131, 0x01);
    ext_phy_regs_1[5] = mii_readPhyRegister(0x170, 0x01);
    ext_phy_regs_1[6] = mii_readPhyRegister(0x171, 0x01);
    ext_phy_regs_1[7] = mii_readPhyRegister(0x173, 0x01);
    ext_phy_regs_1[8] = mii_readPhyRegister(0x175, 0x01);
    ext_phy_regs_1[9] = mii_readPhyRegister(0x176, 0x01);
    ext_phy_regs_1[10] = mii_readPhyRegister(0x177, 0x01);
    ext_phy_regs_1[11] = mii_readPhyRegister(0x178, 0x01);
    ext_phy_regs_1[12] = mii_readPhyRegister(0x180, 0x01);
    ext_phy_regs_1[13] = mii_readPhyRegister(0x181, 0x01);
    ext_phy_regs_1[14] = mii_readPhyRegister(0x182, 0x01);
    ext_phy_regs_1[15] = mii_readPhyRegister(0x183, 0x01);
    ext_phy_regs_1[16] = mii_readPhyRegister(0x184, 0x01);
    ext_phy_regs_1[17] = mii_readPhyRegister(0x185, 0x01);
    ext_phy_regs_1[18] = mii_readPhyRegister(0x186, 0x01);
    ext_phy_regs_1[19] = mii_readPhyRegister(0x187, 0x01);
    ext_phy_regs_1[20] = mii_readPhyRegister(0x188, 0x01);
    ext_phy_regs_1[21] = mii_readPhyRegister(0x189, 0x01);
    ext_phy_regs_1[22] = mii_readPhyRegister(0x18A, 0x01);
    ext_phy_regs_1[23] = mii_readPhyRegister(0x302, 0x01);
    ext_phy_regs_1[24] = mii_readPhyRegister(0x303, 0x01);
    ext_phy_regs_1[25] = mii_readPhyRegister(0x304, 0x01);
    ext_phy_regs_1[26] = mii_readPhyRegister(0x305, 0x01);
    ext_phy_regs_1[27] = mii_readPhyRegister(0x306, 0x01);
    ext_phy_regs_1[28] = mii_readPhyRegister(0x308, 0x01);
    ext_phy_regs_1[29] = mii_readPhyRegister(0x30B, 0x01);
    ext_phy_regs_1[30] = mii_readPhyRegister(0x30C, 0x01);
    ext_phy_regs_1[31] = mii_readPhyRegister(0x30E, 0x01);
    ext_phy_regs_1[32] = mii_readPhyRegister(0x404, 0x01);
    ext_phy_regs_1[33] = mii_readPhyRegister(0x40D, 0x01);
    ext_phy_regs_1[34] = mii_readPhyRegister(0x456, 0x01);
    ext_phy_regs_1[35] = mii_readPhyRegister(0x460, 0x01);
    ext_phy_regs_1[36] = mii_readPhyRegister(0x461, 0x01);
    ext_phy_regs_1[37] = mii_readPhyRegister(0x467, 0x01);
    ext_phy_regs_1[38] = mii_readPhyRegister(0x468, 0x01);
    ext_phy_regs_1[39] = mii_readPhyRegister(0x469, 0x01);
    ext_phy_regs_1[40] = mii_readPhyRegister(0x4A0, 0x01);
    ext_phy_regs_1[41] = mii_readPhyRegister(0x4A1, 0x01);
    ext_phy_regs_1[42] = mii_readPhyRegister(0x4A2, 0x01);
    ext_phy_regs_1[43] = mii_readPhyRegister(0x4A3, 0x01);
    ext_phy_regs_1[44] = mii_readPhyRegister(0x4A4, 0x01);
    ext_phy_regs_1[45] = mii_readPhyRegister(0x4A5, 0x01);
    ext_phy_regs_1[46] = mii_readPhyRegister(0x4A6, 0x01);
    ext_phy_regs_1[47] = mii_readPhyRegister(0x4A7, 0x01);

    ESTOP0;

Best,

Kevin

Edit: Updating functions to fix port1 access