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TMS320F280049C: CAN bootloader bus heavy error when trying to update firmware using default boot settings

Part Number: TMS320F280049C
Other Parts Discussed in Thread: LAUNCHXL-F280049C,

Hi,

I am working on developing a CAN custom bootloader to update the firmware. I am able to write to flash using this program by loading bootloader to RAM through JTAG and default S2 switch positions on LAUNCHXL-F280049C board . But I am getting CAN bus heavy/CAN bus off error if I load the custom bootloader using CAN ROM bootloader. I am using default boot pins (i.e. PIN 32 and 33 ) and CAN defaults (i.e. CANH is 33 and CANL is 32). I see a conflict b/w default boot pins and CANL using same PIN (i.e. PIN 32). How to handle this if I want to use the default boot settings and not custom one since I don't want to use OTP as of now. 

Also I want to know if on request, TI supports loading our custom bootloader into ROM in factory itself? 

Thanks in Advance

Mohan

  • Hi Mohan,

    Few things and some questions:

    The TMS320F280049C CAN ROM Bootloader will take in your custom bootloader at 100kbps as default at 2 bytes per frame. 

    1) In your customer bootloader, are you downloading at this default bitrate and frame size for incoming data? If no, what is the desired bitrate and frame size? You mention wanting to stick with the default boot settings.

    2) For TI factory support, I'll have to check with my team to see if this is something supported. Will get back to you.

    Thanks and regards,

    Charles

  • Hi Charles, Thanks for responding. 

    1) In your customer bootloader, are you downloading at this default bitrate and frame size for incoming data? If no, what is the desired bitrate and frame size? You mention wanting to stick with the default boot settings

    Yes, I am sticking on to 100 kbps speed and default frame size (i.e. 2). This loading of custom bootloader into RAM and execution is working fine. I confirmed it by blinking an LED. But the CAN in custom BL is causing issue (getting BUS HEAVY when I am trying to load application image) with same CAN settings. I am using tweaked dcan_flash_programmer.exe application provided by TI and PCAN device to send the hex file.

    2) For TI factory support, I'll have to check with my team to see if this is something supported. Will get back to you.

    That sounds great.

    Best Regards,

    Mohan

  • Hi Mohan,

    As update, we do not support modifying the ROM bootloader at the factory level for this request. 

    When the custom bootloader re-initializes the device, what are the GPIO pins it is trying to use? Also what is the bootmode listed (ex. CAN_BOOT uses GPIO4/5 sending data). If possible you can switch to boot pins for GPIO4/5 or use the CAN_BOOT_ALT1 bootmode.

    Adding reference for CAN flashing of C2000 devices: ti.com/lit/sprad51

    Thanks and regards,

    Charles

  • what are the GPIO pins it is trying to use?

    I am trying to use the same default pins 32 and 33 and default boot mode 

    If possible you can switch to boot pins for GPIO4/5 or use the CAN_BOOT_ALT1 bootmode

    I need to find a CAN transceiver to use ALT pins. I will check if I can find one and let you know how it goes

  • Ok thanks. If you are using the launchpad version of the F280049C device, there is a CAN routing switch present at bottom right of the Launchpad. You will then need to take in the CAN frames using the ALT setting for the switch, with a CAN USB Adapter attached to the GND, CANL, and CANH pins at the bottom of the board.

    Looking forward to your setup.

    Thanks,

    Charles

  • Hi Charles,

    I tried using CAN B in my CAN kernel (Custom bootloader) and it is working fine. I guess using CANA in both ROM BL and custom BL is causing some issue but not sure of it. I Even used emulator mode to change boot pin from 32 to 0 to avoid conflict with default CANL pin but still CAN bus error occurred. Could you shed some lights on proper CAN reconfiguring steps?

  • Hi Mohan, 

    I'll be able to respond within the next day with some CAN reconfiguring steps, so will get back to you.

    Thanks,

    Charles

  • Mohan,

    Some steps/things to check for in CAN reconfiguring:

    • Check the wires and cable connections for your device setup
    • Confirm that the CAN bootloader is using XTAL as the bit clock source and INTOSC2 as the system clock source when re-initializing with the custom bootloader. Try this while using CAN-A.
    • This device is operating at 100MHz for the system clock, compared to F28003 DCAN example at 120MHz. If the timing is off for the system and CAN bit clock, it could cause bus issues.
    • After downloading the kernel, it takes some time to re-initialize. Are you trying to download the application image immediately following download of the kernel? What is the host programmer you are using to send the CAN kernel and application image? It may need a delay added to it.

    Thanks,

    Charles

  • Mohan,

    I noticed this thread and had a comment.

    As you noted GPIO32 is both a boot mode select pin (must be pulled low during boot)

    And GPIO32 is also the default CANTXA pin if not using OTP to re-configure (which you want to avoid)

    This should work, but you will need to take care on the pull-down resistor used for GPIO32 boot mode select.  It should be weak enough to be over-driven by GPIO32 when the CANTXA function is activated in the ROM CAN bootloader (or a custom bootloader).  What value pull do you have there?  Do you have a scope of the GPIO32 to see if the GPIO buffer is having any trouble overdriving this?

    Best regards,

    Jason

  • Hi Jason,

    Thanks for the suggestion. Currently I am using LaunchXL evaluation board form TI for development. I need to check what is the value used for pull from the schematics. However, the Boot ROM is using the same as CANH line and is working fine unlike custom BL

  • After downloading the kernel, it takes some time to re-initialize. Are you trying to download the application image immediately following download of the kernel? What is the host programmer you are using to send the CAN kernel and application image? It may need a delay added to i

    Double checked. I ran CAN example to check if loop back is happening.

    Confirm that the CAN bootloader is using XTAL as the bit clock source and INTOSC2 as the system clock source when re-initializing with the custom bootloader. Try this while using CAN-A

    I tried with XTAL as CAN bit clock source and system clock as both INTOSC2 and XTAL. All cases are throwing CAN bus error.

    This device is operating at 100MHz for the system clock, compared to F28003 DCAN example at 120MHz. If the timing is off for the system and CAN bit clock, it could cause bus issues

    I am using following #define values to set BRP

    #define CAN_CALC_BITRATE 100000ul
    #define CAN_CALC_CANCLK 100000000ul
    #define CAN_CALC_BITTIME 20ul

    After downloading the kernel, it takes some time to re-initialize. Are you trying to download the application image immediately following download of the kernel? What is the host programmer you are using to send the CAN kernel and application image? It may need a delay added to it.

    I am using tweaked DCAN kernel flash application provided by TI. I modified bit size from 8 to 2, retaining bit rate to 100kbps and sending only one image at a time instead of sending both kernel and application together. After loading the custom BL, I am waiting for PIN 24 connected LED blink (doing this in my custom BL to confirm successful kernel loading) for a secs before using the same host tool to send application image

    Best Regards,

    Mohan

  • Here is CAN initialization code I am using 

    //Initialize the DCAN-A module and configure its bit clock and message objects
    static void DCAN_Boot_Init(uint32_t btrReg, uint16_t switchToXTAL)
    {
    	//Select XTAL for OSCCLK and the CAN bit clock and set the SYSCLK divider to /1
    	EALLOW;
    	if (switchToXTAL)
    	{
    	    //Turn on XTAL and select crystal mode
    	    HWREGH(CLKCFG_BASE + SYSCTL_O_XTALCR) &= ~SYSCTL_XTALCR_OSCOFF;
    	    HWREGH(CLKCFG_BASE + SYSCTL_O_XTALCR) &= ~SYSCTL_XTALCR_SE;
    
    	    //Wait for the X1 clock to saturate
    	    HWREG(CLKCFG_BASE + SYSCTL_O_X1CNT) |= SYSCTL_X1CNT_CLR;
    	    while(HWREGH(CLKCFG_BASE + SYSCTL_O_X1CNT) != 0x3FFU) {;}
    
    		HWREG(CLKCFG_BASE + SYSCTL_O_CLKSRCCTL1) &= ~SYSCTL_CLKSRCCTL1_OSCCLKSRCSEL_M;
    		HWREG(CLKCFG_BASE + SYSCTL_O_CLKSRCCTL1) |= 0x1ul;
    		asm(" RPT #16 || NOP");
    		HWREG(CLKCFG_BASE + SYSCTL_O_CLKSRCCTL2) &= ~SYSCTL_CLKSRCCTL2_CANABCLKSEL_M;
    		HWREG(CLKCFG_BASE + SYSCTL_O_CLKSRCCTL2) |= 0x1ul << SYSCTL_CLKSRCCTL2_CANABCLKSEL_S;
    		HWREG(CLKCFG_BASE + SYSCTL_O_SYSCLKDIVSEL) = 0x0;
    	}
    
    	//Turn on the clock to the DCAN-A module
    	HWREG(CPUSYS_BASE + SYSCTL_O_PCLKCR10) |= SYSCTL_PCLKCR10_CAN_A;
    	EDIS;
    
    	//Put the CAN module into initialization mode, then issue a software reset
    	//via the self-clearing SWR bit.
    	HWREG(CANA_BASE + CAN_O_CTL) = (0x5ul << CAN_CTL_PMD_S) | CAN_CTL_INIT;
    	asm(" RPT #16 || NOP");
    	EALLOW;
    	HWREG(CANA_BASE + CAN_O_CTL) |= CAN_CTL_SWR;
    	EDIS;
    	asm(" RPT #16 || NOP");
    
    	//Initialize the CAN message RAM
    	HWREG(CANA_BASE + CAN_O_RAM_INIT) = CAN_RAM_INIT_CAN_RAM_INIT | 0xa;
    	while ((HWREG(CANA_BASE + CAN_O_RAM_INIT) & CAN_RAM_INIT_RAM_INIT_DONE) != CAN_RAM_INIT_RAM_INIT_DONE) {;}
    
    	//Enable config register access, set up the bit timing, and make sure
    	//parity stays enabled.
    	HWREG(CANA_BASE + CAN_O_CTL) = (0xAul << CAN_CTL_PMD_S) | CAN_CTL_CCE | CAN_CTL_INIT;
    	HWREG(CANA_BASE + CAN_O_BTR) = btrReg;
    
    	//Set up a receive message object via interface 1, then transfer it to the
    	//message RAM.
    	HWREG(CANA_BASE + CAN_O_IF1ARB) = CAN_IF1ARB_MSGVAL | (0x1ul << 18ul);
    	HWREG(CANA_BASE + CAN_O_IF1MCTL) = CAN_IF1MCTL_EOB | (2ul << CAN_IF1MCTL_DLC_S);
    	HWREG(CANA_BASE + CAN_O_IF1MSK) = 0xffffffff;
    	HWREG(CANA_BASE + CAN_O_IF1CMD) = CAN_IF1CMD_DIR | CAN_IF1CMD_MASK | CAN_IF1CMD_ARB | CAN_IF1CMD_CONTROL | CAN_IF1CMD_CLRINTPND | 1ul;
    	while (HWREG(CANA_BASE + CAN_O_IF1CMD) & CAN_IF1CMD_BUSY) {;}
    
    	//Set up a transmit object via interface 2 for debug, then transfer it to
    	//the message RAM.
    	HWREG(CANA_BASE + CAN_O_IF2ARB) = CAN_IF2ARB_MSGVAL | CAN_IF2ARB_DIR | (0x2ul << 18ul);
    	HWREG(CANA_BASE + CAN_O_IF2MCTL) = CAN_IF2MCTL_EOB | (2ul << CAN_IF2MCTL_DLC_S);
    	HWREG(CANA_BASE + CAN_O_IF2MSK) = 0xffffffff;
    	HWREG(CANA_BASE + CAN_O_IF2CMD) = CAN_IF2CMD_DIR | CAN_IF2CMD_MASK | CAN_IF2CMD_ARB | CAN_IF2CMD_CONTROL | CAN_IF2CMD_CLRINTPND | 2ul;
    	while (HWREG(CANA_BASE + CAN_O_IF2CMD) & CAN_IF2CMD_BUSY) {;}
    
    	//Leave inititalization mode and disable timing register access and
    	//automatic retransmission.
    	HWREGH(CANA_BASE + CAN_O_CTL) &= ~(CAN_CTL_CCE | CAN_CTL_INIT);
    }
    

    Best Regards,

    Mohan

  • Hi Mohan,

    What are the values you are using for TSEG1, TSEG2, NOM_SJW for the host transmission? Have you tried other similar values for bitrate at the same/different sample point?

    As stated above by referring to the GPIOs used, GPIO32/33 if on the launchpad require R46 resistor to be populated with a 0-ohm resistor if you wish to use the default option and the CAN routing switch for the launchpad (LAUNCHXL-F280049C Schematic).

    Thanks and regards,

    Charles