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TMS320F28379D: Configuration et test de TZ5 et TZ6.

Florentin Schneider
Prodigy 100 points
Part Number: TMS320F28379D

Hi, I'd like to configure the trip zones of my pwm signal to set my signal low in case of ClockFAil or EMUSTOP. I've seen in the documentation that TZ5 and TZ6 are respectively linked to these errors. I configured both trip zone and PIE vector in this way:
    
    EALLOW;
    PieVectTable.EPWM1_TZ_INT = &Epwm1_TZ1;
    EDIS;
    IER |= M_INT2;
    PieCtrlRegs.PIEIER2.bit.INTx1 = 1;

    EINT;  
    ERTM;
   
    EALLOW;
    EPwm1Regs.TZSEL.bit.CBC5 = 1;
    EPwm1Regs.TZSEL.bit.OSTH6 = 1;
    EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_LO;
    EPwm1Regs.TZCTL.bit.TZB = TZ_FORCE_LO;
    EPwm1Regs.TZEINT.bit.CBC = 1;
    EPwm1Regs.TZEINT.bit.OST = 1;
    EDIS;


Does it suffer to generate signal interference in case of ClockFAil and EMUSTOP, or do I have to do some other configuration? And if it does suffer, I'd like to know how to test these two trip zones.

Thanks in advance.

  • 0
    TI__Mastermind 23040 points

    Hi Florentin,

    So far, this looks correct to me for using TZ5 as a cycle-by-cycle trip source and TZ6 as a one-shot trip source (both to drive channels A and B low), but please allow for me to take a closer look and get back to you more definitively tomorrow.

    The TZn signals are "active-low" signals, meaning that the trip signal is created when the pin is at a low level (a digital '0'). Normally, you can test these by driving the pin corresponding to that TZ signal low, however, since TZ5 and TZ6 are connected to the clockfail and EMUSTOP for the CPU internally I will have to double check on this as well - I appreciate your patience!

    Best Regards,

    Allison

  • 0 in reply to Allison Nguyen
    Prodigy 100 points

    Hello Allison,
    Thank you for your reply. I tried to connect TZ1 and TZ2 on a pin to disable the pwm signal and it works. I'd like to see if this is the case for TZ5 and TZ6. I can send you more of my code in detail if that helps.
    Best regards,
    Florentin

  • 0 in reply to Florentin Schneider
    TI__Mastermind 23040 points

    Hi Florentin,

    Glad to see you are able to get it working for TZ1 and TZ2.

    You cannot test TZ5 and TZ6 in the same way (through a GPIO) since TZ5/6 are internally connected; however, you could induce a clockfail for for TZ5 by removing the clock if you're using a waveform generator as your clock, and you could use the code line 'ESTOP0' to halt emulation and simulate EMUSTOP for TZ6 while watching (i.e. oscilloscope) your PWM waveforms to see if they behave as expected.

    Best Regards,

    Allison