This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28384S: Will the interrupt be generated twice about mcan_ex4_receive?

Part Number: TMS320F28384S

Hi Experts,

I am asking for my customer here.

They refer mcan_ex4_receive example to develop MCAN.

The customer tested this routine and found that the interrupt was set to 1 again before the execution was completed. This will inevitably lead to another interrupt after the interrupt is responded to. Will the interrupt be generated twice? Thanks.

CANFD的进2次中断截图.docx

  • Hello, I have the same problem. When receiving a CAN message two consecutive interrupts are generated, without even setting an interrupt flag for the second interrupt.

  • I am able to recreate the issue on my local setup. Will check this with the hardware team and get back to you. 

    Thanks. 

  • Hi Sahil,

    Very thanks for your help. Hope we can get result ASAP!

  • Hi Sahil,

    Any updates here? ASAP!

  • Hi, 

    As you rightly pointed out, the interrupt is not being cleared properly. 

    If you flip the order in which the clear interrupt functions are called, it works as expected. 

    Fullscreen
    1
    2
    3
    4
    5
    6
    7
    8
    9
    //
    // Clear the interrupt Status. ***(Call First)
    //
    MCAN_clearIntrStatus(MCANA_DRIVER_BASE, intrStatus);
    //
    // Clearing the interrupt lineNum ***(Call Second)
    //
    HW_WR_FIELD32(MCANA_DRIVER_BASE + MCAN_MCANSS_EOI, MCAN_MCANSS_EOI, 0x2);
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    Thanks. 

  • Okay, why is this difference here?

  • I picked this up from hardware test repos and validated it on an example running on F28P65x Launchpad (same ip as F2838x).

    For the exact interrupt mechanism, I can check with the hardware and get back to you. 

    Thanks. 

  • Hi Sahil,

    my customer is now using F28P65 and she found the same problem. She solved the problem with the method that provided in this thread, but she would like to know the cause.

    Is there any update for the cause?

    Thanks!

    Kita

  • Kita, 

    To clear any interrupt, you need to follow a sequence from source to destination. In the case of MCAN, it is as follows:

    IR -> EOI -> pie 

    Despite clearing EOI, it is reset if IR is still set as in the first sequence, which triggers the second ISR where the IR is already cleared and only then, EOI gets finally cleared. 

    In the second sequence, the interrupt is cleared in the intended sequence, and hence, the number of times the ISR is called is as expected. 

    Thanks.