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TMS320F28377D: does CPU1 and CPU2's CPUtimers exist respectively?

Yale Li 李耀先
Expert 4660 points
Part Number: TMS320F28377D


That means CPU1 has its own CPUtimer0/1/2, CPU2 also has its own CPUtimer0/1/2.

Or they muxed use them?

We find this diagram in datasheet:

But My customer said when he use both of CPU1 and CPU2's timer0, the CPU2's doesn't work. The configurations are the same. Only change the CPU2's timer0 to timer1, It can work.

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Thanks & Regards

  • +1
    TI__Mastermind 30185 points

    Hello Yale,

    Yale Li 李耀先 said:
    That means CPU1 has its own CPUtimer0/1/2, CPU2 also has its own CPUtimer0/1/2.

    That is correct.

    Yale Li 李耀先 said:
    But My customer said when he use both of CPU1 and CPU2's timer0, the CPU2's doesn't work. The configurations are the same. Only change the CPU2's timer0 to timer1, It can work.

    What does the customer mean the timer doesn't work for CPU2? Are they not getting an expected interrupt? Is the timer not changing? Please get as much detail about the issue as you can. If they're using a debug session to verify the timers, make sure they select the core they want to examine using the Debug window.