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TMS320F28335: Maximum PWM Frequency

Part Number: TMS320F28335
Other Parts Discussed in Thread: C2000WARE

Hello,

I am trying to achieve 25MHz PWM frequency using TMS320f28335 where the clock frequency is 150MHz. For that I am using UP counter and EPwm1Regs.TBPRD = 6;

I am keeping duty cycle 50%. EPwm1Regs.CMPA.half.CMPA = 3.

However, there was no pulse showing. When I keep the TBPRD value=30, I see the PWM pulse. But if I give TBPRD=20 or lower, I don't see any pulses coming from PWM1A.

The PWM1 was set like,

EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET; // set actions for EPWM1A
EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;
EPwm1Regs.AQCTLB.bit.ZRO = AQ_CLEAR; // Set PWM1A on Zero
EPwm1Regs.AQCTLB.bit.CAU = AQ_SET;

Let me know if there are any limitations for achieving such high frequency.

Thanks!

Naveed

  • Hi Naveed,

    The datasheet indicates that minimum PWM cycle width is 20ns (50MHz), so 25MHz should be achievable. For up-count (asymmetric) calculations: TBPRD = (FTBCLK/FPWM) -1 = (150 MHz/ 25MHz) -1 = 5. I can try to test this out tomorrow and let you know if there are any issues I can see.

    To clarify, are you saying that TBPRD of 20 is the cutoff for you seeing any EPWM pulses? Can I ask to confirm what your clock dividers are?

    Best Regards,

    Allison

  • Thanks for reaching out Allison.

    My CLKDIV are given below:

    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1; // Clock ratio to SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;

    #define TB_DIV1 0x0

    I tried with TBPRD=20 when the PWM signals were not coming. If I give 30 it is coming.

  • Hi Naveed,

    You should be able to use 25MHz (as this is the max GPIO toggling frequency specified in the datasheet). Are you changing anything else in the code when you change the TBPRD values to test? Also, are you using any example code from C2000Ware?

    Best Regards,

    Allison