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TMS320F28386D: EMIF interface sharing doubt

Part Number: TMS320F28386D


Hello,

I am currently designing a control system based on the TMS320F28386D microcontroller. In this system, the EMIF1 interface is mainly use for reading data from a 16-bits  ADC.

The process of reading continuously the ADC is done by the CPU1, since is responsible for the main converter control loop.

However when a  certain condition is acomplish, as overcurrent or voltage dip detection, the CPU2 must use the same EMIF1 to store in an external memory the data received. Therefore in a period of some seconds the CPU1 must be able of read the data from the ADC everytime new data is available, and then leave the EMIF1 ownership to the CPU2 to send the current data to the external memory.

¿How this process could be done?

Thanks in advance.

Daniel Perez.