Part Number: TMS320F28379D
您好,我对贵公司28379d芯片技术手册上关于flash memory map的部分内容有所疑惑:CPU1和CPU2的分别所对应flash的虚拟地址是一样的,虚拟地址经过MMU处理后的物理地址不同,加起来一共有1M字节的空间。因此CPU1和CPU2可以同时对比如0x80000(sector 0)的flash虚拟地址进行读写操作。 请问我的理解正确吗?
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Part Number: TMS320F28379D
您好,我对贵公司28379d芯片技术手册上关于flash memory map的部分内容有所疑惑:CPU1和CPU2的分别所对应flash的虚拟地址是一样的,虚拟地址经过MMU处理后的物理地址不同,加起来一共有1M字节的空间。因此CPU1和CPU2可以同时对比如0x80000(sector 0)的flash虚拟地址进行读写操作。 请问我的理解正确吗?
Reposting in English:
Hi, I am confused about the part of flash memory map in your company 28379d chip technical manual: CPU1 and CPU2 the corresponding flash virtual address is the same, the virtual address after MMU processing the physical address is different, Together, there is a total of 1M bytes of space. Therefore, CPU1 and CPU2 can read and write to flash virtual addresses such as 0x80000 (sector 0) at the same time. Do I understand this correctly?
There are physically 2 different flash banks on this device, but the mapping is unique to each CPU core, that part is correct. So, simultaneous reads are possible from CPU1 and CPU2 to their respective flashes at the "same" address.
Writing(programming) to both flash banks simultaneously is NOT possible however, as there is only one flash pump/controller on the device that is used to support both banks. You can still be reading/executing code from CPU2's flash while programming CPU1 flash, or vice-versa; just not writing both at the same time.
Best,
Matthew