Other Parts Discussed in Thread: C2000WARE
Dear Experts,
I am executing test to verify the if there is any interference occurs in CPU due the read/write operation performed by another CPU.
In Both the scenarios I am using different IPC counter to capture the delta time (gf32TimeUs). In both scenarios, I have two section
of the code which gets executed in the loaded core based on the gu16CpuId from System Controller module.
In all scenarios, I have loaded output (.out) file enabling this below function in CPU1 and loaded .out file in CPU2 disabling the same function and I got the below timings.
#1. Scenario:
-------------------------
Result/Output:
The timing aspect observed are:
CPU1 Read -> 430.125 microseconds
CPU1 Write -> 430.125 microseconds
CPU2 Read -> 409.64 microseconds
CPU2 Write -> 430.125 microseconds
- Code snippet:
void ReadIntinCPU1due2CPU2Read_SameBlock()
{
UINT16 i = 0;
while (1)
{
i = 0;
if( CPUID_1 == gu16CpuId )
{
start = guniIpcRegs.gstrCpu1IpcRegs.IPCCOUNTERL;
for (i = 0; i < u16size; i++)
{
gu16GS0_Array[i]; // For write, replacing this line to "gu16GS0_Array[i] = 6;"
}
end = guniIpcRegs.gstrCpu1IpcRegs.IPCCOUNTERL;
gf32TimeUs = (FLOAT32)(end - start)*0.005f;
}
i = 0;
if( CPUID_2 == gu16CpuId )
{
start = guniIpcRegs.gstrCpu1IpcRegs.IPCCOUNTERL;
for (i = 0; i < u16size; i++)
{
gu16GS0_Array[i]; // For write, replacing this line to "gu16GS0_Array[i] = 7;"
}
end = guniIpcRegs.gstrCpu1IpcRegs.IPCCOUNTERL;
gf32TimeUs = (FLOAT32)(end - start)*0.005f;
}
}
}
#2. Scenario:
-------------------------
I have reversed the sequence of execution of Code in CPU block i.e., (CPUID_2 == gu16CpuId) followed by (CPUID_1 == gu16CpuId) and executed the same test and got the below result.
#Result/Output:
The timing aspect observed are:
CPU1 Read -> 409.64 microseconds
CPU1 Write -> 430.125 microseconds
CPU2 Read -> 430.125 microseconds
CPU2 Write -> 430.125 microseconds
- Code Snippet:
void ReadIntinCPU1due2CPU2Read_SameBlock()
{
UINT16 i = 0;
while (1)
{
i = 0;
if( CPUID_2 == gu16CpuId )
{
start = guniIpcRegs.gstrCpu2IpcRegs.IPCCOUNTERL;
for (i = 0; i < u16size; i++)
{
gu16GS0_Array[i]; // For write, replacing this line to "gu16GS0_Array[i] = 7;"
}
end = guniIpcRegs.gstrCpu2IpcRegs.IPCCOUNTERL;
gf32TimeUs = (FLOAT32)(end - start)*0.005f;
}
i = 0;
if( CPUID_1 == gu16CpuId )
{
start = guniIpcRegs.gstrCpu1IpcRegs.IPCCOUNTERL;
for (i = 0; i < u16size; i++)
{
gu16GS0_Array[i]; // For write, replacing this line to "gu16GS0_Array[i] = 6;"
}
end = guniIpcRegs.gstrCpu1IpcRegs.IPCCOUNTERL;
gf32TimeUs = (FLOAT32)(end - start)*0.005f;
}
}
}
#Queries/Observations:
- If I compare the Read timings on CPU1, I see the difference i.e., in Scenario #1 the CPU1 Read -> 430.125 microseconds where as in Scenario #2 the CPU1 Read -> 409.64 microseconds. The same happened for CPU2 Read as well i.e., in scenario #1 CPU2 Read -> 409.64 microseconds whereas in Scenario #2 CPU2 Read -> 430.125 microseconds.
- The only difference in the above two functions is the positions of the CPUs performing there tasks, but that should not effect the timings as these task is performed in the particular CPU.
Q1. Why these behavior are observed ?
Q2. Is there any impact of mastership ?
Q3. Is there any exception in accessing the RAM sections like GS0-GS4 should be accessed by CPU1 and rest by CPU2 ?
please share if there is any document to refer to understand the internals of GSx RAM to support this test.
