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TMS320F28386D: Interrupt and handler ralationship

W Z
Expert 2350 points
Part Number: TMS320F28386D


Registers a function to be called when an interrupt occurs

Interrupt_register(INT_NMI, &nmiISR);

Question: Does map file clearly show the relationship between this INT_NMI with its handler?

Due to in the project  some where may register the INT_NMI with another handler. Such as 

Interrupt_register(INT_NMI, &TestISR);

I  want to confirm which one is actually handler for the INT_NMI.

  • 0
    TI__Expert 8231 points

    Hi WZ,

    When the INT_NMI interrupts occurs, which ISR did it execute? Can you put a breakpoint and confirm.

    What was the TestISR configured for?

    Have you validated the case and got a wrong result?

    Thanks

    Aswin

  • 0 in reply to Aswin P
    Expert 2350 points

    f2838x_globalvariabledefs.c

    #ifdef __cplusplus
    #pragma DATA_SECTION("PieVectTableFile")
    #else
    #pragma DATA_SECTION(PieVectTable,"PieVectTableFile");
    #endif
    volatile struct PIE_VECT_TABLE PieVectTable;

    I find that have instance of PIE_VECT_TABLE, but add it to the epressions, it cannot show the content 

  • 0 in reply to Aswin P
    Expert 2350 points

    From the sequence, first register Interrupt_register(INT_NMI, &nmiISR);

    second register  Interrupt_register(INT_NMI, &TestISR);

    We use the test counter to test, that nmiISR has increased , but TestISR did not have increased counter.

    So I want to to confrim the actually handler for the INT_NMI

  • 0 in reply to W Z
    Expert 2350 points

    It is because that no usegae of instance(PieVectTable), after to use it, debugger epressions can show the content 

  • +1 in reply to W Z
    TI__Expert 8231 points

    Hi WZ,

    yes you are right. Since there is no usage of the instance, it would not have updated in the register view.

    I suggest you to check in the memory map for the PIEVECT location, or you can add it in the project properties to retain the value.

    Also it would rewrite the ISR handler if you are defining multiple ISR for the same interrupt (Will be taking the last added ISR handler).

    Thanks

    Aswin

  • 0 in reply to Aswin P
    Expert 2350 points

     memory map for the PIEVECT location, does it mean that use debugger to view the memory window of specified address?

  • +1 in reply to W Z
    TI__Expert 8231 points

    Yes, you can view the value using the memory browser window in CCS.

    Thanks

    Aswin