Part Number: TMS320F28P650DK
Other Parts Discussed in Thread: LAUNCHXL-F28P65X
Hello TI Support,
I'm using LAUNCHXL-F28P65X with a XF28P650DK9 and I'm facing with a strange behavior with the following bunch of instructions.
Let me describe the case: I put a breakpoint on the first Asm instruction and then I run the code step by step, till EDIS.
asm( nop);
EALLOW;
EPwm1Regs.TZFRC.bit.OST = 1;
EPwm9Regs.TZFRC.bit.OST = 1;
EPwm2Regs.TZFRC.bit.OST = 1;
EPwm10Regs.TZFRC.bit.OST = 1;
EDIS;
On EDIS, looking the flags OST register belonging to the Epwm modules, I mean,
EPwm1Regs.TZFLG.bit.OST
EPwm9Regs.TZFLG.bit.OST
EPwm2Regs.TZFLG.bit.OST
EPwm1Regs.TZFLG.bit.OST
I don't find all flags set to 1 as expected.
The goal of my "trip actions" is put the Epwm outputs to low level, so I have verified the "trip actions" through the oscilloscope.
I repeated the test many times and there is a delay among falling edges of Epwm outputs; falling because fields of TZCTL registers are set to "Force EPWM to low state".
The mentioned delay is bigger than half of switching period, 4us or bigger.
Let me say that I split this strange behavior into two parts:
first: CCS access register refresh
second: trip zone force by code
I can neglect the first topic but not the second one; so please can you help me ?
Thank you very much,
Ettore