TMS320F28379D: #10247-D creating output section ".data" without a SECTIONS specification

Hi Clecio,

Can you please share the complete linker cmd file for further analysis. 

And you are using output format as EABI right ?

Thanks

Aswin

Hi Aswin.

I'm using legacy COFF. I'm using the F2837xD_Headers_BIOS_cpu1.cmd that comes with the C2000Ware, and the following cmd:

/* File Header
 * - TODO
 */

/* CLA_SCRATCHPAD
 * Define a size for the CLA scratchpad area that will be used
 * by the CLA compiler for local symbols and temps
 * Also force references to the special symbols that mark the
 * scratchpad are.
 */
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start

/* Physical memory allocation */
MEMORY
{
PAGE 0 :
	/* Program Memory */

   /*
	* Application entry point.
	* Whenever the bootloader receives a command to jump to
	* application firmware it jumps here
	*/
    BEGIN : origin = 0x086000, length = 0x000002

	/* Reset */
    RESET : origin = 0x3FFFC0, length = 0x000002

   /*
	* CLA Program memory.
	* Use to execute CLA Tasks and functions.
	*/
	//RAMLS4 : origin = 0x00A000, length = 0x000800
	//RAMLS5 : origin = 0x00A800, length = 0x000800
	CLA_PROG_RAM : origin = 0x00A000, length = 0x001000

   /*
	* CPU Program memory.
	* Use to execute CPU functions from RAM.
	*/
	//RAMGS4 : origin = 0x010000, length = 0x001000
    //RAMGS5 : origin = 0x011000, length = 0x001000
	RAM_PROGRAM : origin = 0x010000, length = 0x002000

   /*
	* Bootloader code.
	* Bootloader firmware code goes here
	* thus FLASHA and FLASHB must not be used by application code!
	*/
    //FLASHA  : origin = 0x080002, length = 0x001FFE
	//FLASHB : origin = 0x082000, length = 0x002000

   /*
	* Application code.
	* Application firmware code goes here.
	*/
    FLASHD : origin = 0x086002, length = 0x001FFE
    FLASHE : origin = 0x088000, length = 0x008000
    FLASHF : origin = 0x090000, length = 0x008000
	FLASHG : origin = 0x098000, length = 0x008000

   /*
	* Reserved for future use.
	* Could be used to store factory default application firmware
	* or used to store persistant data.
	*/
	//FLASHI : origin = 0x0A8000, length = 0x008000
	//FLASHJ : origin = 0x0B0000, length = 0x008000
	//FLASHK : origin = 0x0B8000, length = 0x002000
	//FLASHL : origin = 0x0BA000, length = 0x002000

PAGE 1 :
	/* Data Memory */

	/* BOOT ROM Stack
	 * - ECC, Hibernate retention and Access protection
	 */
    BOOT_RSVD : origin = 0x000002, length = 0x000121

   /*
	* Small nonsecure blocks that are tightly coupled with the CPU
	* (that is, only the CPU has access to them).
	* Has Hibernate Retention.
	* May be used as general purpose RAM.
	*/
	RAMM0 : origin = 0x000123, length = 0x0002DD
	RAMM1 : origin = 0x000400, length = 0x0003F8

   /*
	* Secure RAM.
	* General purpose RAM with ECC, Security and Access protection features.
	*/
	RAMD0 : origin = 0x00B000, length = 0x000800
	RAMD1 : origin = 0x00B800, length = 0x000800

   /*
	* CLA data memory.
	* Has Parity, Security and Access protection features
	*/
	//RAMLS0 : origin = 0x008000, length = 0x000800
	//RAMLS1 : origin = 0x008800, length = 0x000800
	//RAMLS2 : origin = 0x009000, length = 0x000800
	//RAMLS3 : origin = 0x009800, length = 0x000800
	CLA_DATA_RAM : origin = 0x008000, length = 0x002000

   /*
	* CPU data memory.
	* RAMGS0 and RAMGS1 must always be used as data memory
	* because, since they are within the lower 64k words,
	* they can be used for SYS/BIOS Thread Stacks. Usually one would
	* use the RAMLSx for thrad stack, however we have dedicated all
	* local shared RAMs to the CLA.
	*/
	RAMGS0 : origin = 0x00C000, length = 0x001000
	RAMGS1 : origin = 0x00D000, length = 0x001000

   /*
	* The remaining RAMGSx blocks can be allocated
	* for anything.
	*/
	RAMGS6 : origin = 0x012000, length = 0x001000
	RAMGS7 : origin = 0x013000, length = 0x001000
	RAMGS8 : origin = 0x014000, length = 0x001000
	RAMGS9 : origin = 0x015000, length = 0x000F00

    /*
	* This regions are exclusively used by CpuxSharedIO section
	* and must be equal in the linker command files of both CPUs
	*/
	CPU1_SHARED_IO : origin = 0x015F00, length = 0x000FC
	CPU2_SHARED_IO : origin = 0x01BF00, length = 0x00100


	TEMP_SENSOR_OFFSET : origin = 0x015FFC, length = 0x000002
	TEMP_SENSOR_SLOPE  : origin = 0x015FFE, length = 0x000002

   /*
	* Bootloader data.
	* Bootloader const data goes here
	* thus FLASHC must not be used by application code!
	*/
    //FLASHC : origin = 0x084000, length = 0x002000

   /*
	* Application firmware const data.
	*/
	FLASHH : origin = 0x0A0000, length = 0x008000

   /*
	* Reserved for future use.
	* Could be used to store factory default application firmware
	* or used to store persistent data.
	*/
	//FLASHM : origin = 0x0BC000, length = 0x002000

	/* App and Boot Shared Consts
	 * The following regions: APP_METADATA, APP_SHARED_CONST
	 * and BOOTLOADER_SHARED_CONST are all located at Flash
	 * Sector 13, aka FLASH N.
	 */

	/* Application Metadata
	 * This flash region is used to store
	 * information about the application firmware
	 */
	APP_METADATA : origin = 0x0BE000, length = 0x000080 //128 words

	/* Application shared consts
	 * This flash region can be used freely to share consts data and functions between
	 * application firmware and bootloader. This region must be
	 * Read Only for Bootloader but Read/Write for the Application firmware.
	 */
	APP_SHARED_CONST : origin = 0x0BE080, length = 0x000FC0 //4032 words

	/* Bootloader shared consts
	 * This flash region can be used freely to share consts data and functions between
	 * application firmware and bootloader. This region must be
	 * Read/Write for Bootloader but Read Only for the Application firmware
	 */
	BOOTLOADER_SHARED_CONST : origin = 0x0BF040, length = 0x000FC0 //4032 words

   /*
	* CPU and CLA message RAM.
	* Has Parity, Security and Access protection features
	*/
	CLATOCPU : origin = 0x001480, length = 0x000080
	CPUTOCLA : origin = 0x001500, length = 0x000080

   /*
	* CPU1 and CPU2 message RAM.
	*/
    CPU2TOCPU1 : origin = 0x03F800, length = 0x000400
    CPU1TOCPU2 : origin = 0x03FC00, length = 0x000400

   /*
	* External SDRAM accessed by EMIF
	*/
    SDRAM : origin = 0x80000000, length = 0x00800000
}

/* Sections allocation into physical memory */
SECTIONS
{
	/* Allocate program memory
	 * - codestart: Jump address after boot rom
	 * - .reset: Reset vector | This section is not typically used by C28x devices and should be set to type=DSECT.
	 * - .cinit: Initalized global and static variables | Non volatile memory (flash)
	 * - .binit: Copy tables for boot time initialization
	 * - .init_array and .pinit: Contains the list of global constructors for C++ programs
	 * - .text: Executable code and constants | Load into non-volatile memory (flash). Run time-critical code in SARAM.
	 * - ramfuncs and .TI.ramfunc: TI section to store functions that must run from RAM (see --ramfunc=on/off linker command)
	 */

	codestart           : > BEGIN PAGE = 0, ALIGN(8)
	.reset           	: > RESET, PAGE = 0, TYPE = DSECT

	.switch             : > FLASHD | FLASHE | FLASHF | FLASHG, PAGE = 0, ALIGN(8)
    .cinit              : > FLASHD | FLASHE | FLASHF | FLASHG, PAGE = 0, ALIGN(8)
    .binit              : > FLASHD | FLASHE | FLASHF | FLASHG, PAGE = 0, ALIGN(8)
#ifdef __TI_EABI__
    .init_array         : > FLASHD | FLASHE | FLASHF | FLASHG, PAGE = 0, ALIGN(8)
#else
    .pinit              : > FLASHD | FLASHE | FLASHF | FLASHG, PAGE = 0, ALIGN(8)
#endif
    .text               : >> FLASHD | FLASHE | FLASHF | FLASHG, PAGE = 0, ALIGN(8)

#ifdef __TI_COMPILER_VERSION__
	#if __TI_COMPILER_VERSION__ >= 15009000
		#if defined(__TI_EABI__)
			.TI.ramfunc : {} LOAD = FLASHD | FLASHE | FLASHF | FLASHG,
			                 RUN = RAM_PROGRAM,
			                 LOAD_START(RamfuncsLoadStart),
			                 LOAD_SIZE(RamfuncsLoadSize),
			                 LOAD_END(RamfuncsLoadEnd),
			                 RUN_START(RamfuncsRunStart),
			                 RUN_SIZE(RamfuncsRunSize),
			                 RUN_END(RamfuncsRunEnd),
			                 PAGE = 0, ALIGN(8)
		#else
			.TI.ramfunc : {} LOAD = FLASHD | FLASHE | FLASHF | FLASHG,
			                 RUN = RAM_PROGRAM,
			                 LOAD_START(_RamfuncsLoadStart),
			                 LOAD_SIZE(_RamfuncsLoadSize),
			                 LOAD_END(_RamfuncsLoadEnd),
			                 RUN_START(_RamfuncsRunStart),
			                 RUN_SIZE(_RamfuncsRunSize),
			                 RUN_END(_RamfuncsRunEnd),
			                 PAGE = 0, ALIGN(8)
		#endif
	#else
		ramfuncs : LOAD = FLASHD | FLASHE | FLASHF | FLASHG,
		           RUN = RAM_PROGRAM,
		           LOAD_START(_RamfuncsLoadStart),
		           LOAD_SIZE(_RamfuncsLoadSize),
		           LOAD_END(_RamfuncsLoadEnd),
		           RUN_START(_RamfuncsRunStart),
		           RUN_SIZE(_RamfuncsRunSize),
		           RUN_END(_RamfuncsRunEnd),
		           PAGE = 0, ALIGN(8)
	#endif
#endif

	/* Allocate data memory at RAM
	 * - .stack: Stack space | Volatile memory (SRAM). The C28x Stack Pointer (SP) is 16 bits. .stack must be in the low 64k words.
	 * - .bss and ebss: Global and static variables | Volatile memory (SRAM)
	 * - .sysmem and .esysmem: Memory for malloc type functions | Volatile memory (SRAM)
	 * - .data: Initialized data
	 * - .cio: Debugger section | Buffer for stdio functions
	 */

    /*
	 * .stack section cannot be split and must be in the low 64k words
	 * This section is only used for HWIs and SWIs. SYS/BIOS Thread stacks are allocated in .ebss
	 */
    .stack           	: > RAMM0,  PAGE = 1, ALIGN(8)
#ifdef __TI_EABI__
    .bss             	: >> RAMGS0 | RAMGS1 | RAMGS6 | RAMGS7 | RAMGS8 | RAMGS9,  PAGE = 1, ALIGN(8)
    .bss:output      	: >> RAMGS0 | RAMGS1 | RAMGS6 | RAMGS7 | RAMGS8 | RAMGS9,  PAGE = 1, ALIGN(8)
    .sysmem          	: > RAMGS6 | RAMGS7 | RAMGS8 | RAMGS9,  PAGE = 1, ALIGN(8)
    .data            	: > RAMGS6 | RAMGS7 | RAMGS8 | RAMGS9,  PAGE = 1, ALIGN(8)
#else
	.ebss            	: >> RAMGS0 | RAMGS1 | RAMGS6 | RAMGS7 | RAMGS8 | RAMGS9,  PAGE = 1, ALIGN(8)
	.esysmem         	: > RAMGS6 | RAMGS7 | RAMGS8 | RAMGS9,  PAGE = 1, ALIGN(8)
#endif
    .cio    	 		: >> RAMM1 | RAMGS6 | RAMGS7 | RAMGS8 | RAMGS9,  PAGE = 1, ALIGN(8)

	/* Allocate data memory at FLASH
	 * - .const and econst: Constant data | Non volatile memory (flash)
	 * - .switch: Tables for switch statements | Non volatile memory (flash)
	 * - .args: Section used to pass arguments via argc and argv
	 */

#ifdef __TI_EABI__
    .const              : > FLASHH, PAGE = 1, ALIGN(8)
#else
    .econst             : > FLASHH, PAGE = 1, ALIGN(8)
#endif
    .args               : > FLASHH, PAGE = 1, ALIGN(8)

   /*
	* All variables declared with __attribute__((far))
	* will be allocated here
	*/
	.farbss 			: > SDRAM, PAGE = 1, ALIGN(8)

	/* Application Metadata Section */
	AppMetadata : > APP_METADATA, PAGE = 1

   /*
	* This section must be made up of only Global Shared RAM.
	*/
    CpuRamData : >> RAMGS6 | RAMGS7 | RAMGS8 | RAMGS9, PAGE = 1

    /*
	* This section is dedicated to allocate objects shared between CPUs.
	*/
    Cpu1SharedIO : > CPU1_SHARED_IO, PAGE = 1
    Cpu2SharedIO : > CPU2_SHARED_IO, PAGE = 1


   /*
	* This section is not shared with CLA or DMA.
	* It is exclusively for CPU usage.
	*/
    CpuDedicatedRAM : >> RAMM0 | RAMM1 | RAMD0 | RAMD1, PAGE = 1

	TempSensOffset : > TEMP_SENSOR_OFFSET, PAGE = 1
	TempSensSlope  : > TEMP_SENSOR_SLOPE, PAGE = 1


	/* Allocation sections needed for IPC API Drivers
	 * - CPU1TOCPU2: Message RAM to pass data from CPU01 to CPU02 | IPC Driver
	 * - CPU2TOCPU1: Message RAM to pass data from CPU02 to CPU01 | IPC Driver
	 */

    GROUP : > CPU1TOCPU2, PAGE = 1
    {
        PUTBUFFER
        PUTWRITEIDX
        GETREADIDX
    }

    GROUP : > CPU2TOCPU1, PAGE = 1
    {
        GETBUFFER :    TYPE = DSECT
        GETWRITEIDX :  TYPE = DSECT
        PUTREADIDX :   TYPE = DSECT
    }

	/* Allocation CLA specific sections
	 * - cla_to_cpu_ram: Message RAM to pass data from CLA to CPU
	 * - cpu_to_cla_ram: Message RAM to pass data from CPU to CLA
	 * - Cla1Prog: CLA program ram section
	 * - CLAscratch: CLA_SCRATCHPAD_SIZE cla section size
	 * - .scratchpad: Local variables and compiler temps are placed into a scratchpad memory area, which acts as the CLA C software stack.
	 *			      It is expected that the scratchpad memory area is defined and managed in the application's linker command file.
	 * - .bss_cla: Uninitialized global data
	 * - .const_cla: Initialized constant data
	 */

	cla_to_cpu_ram		: > CLATOCPU, PAGE = 1
	cpu_to_cla_ram  	: > CPUTOCLA, PAGE = 1

    Cla1Prog : LOAD = FLASHD | FLASHE | FLASHF | FLASHG,
               RUN = CLA_PROG_RAM,
               LOAD_START(_Cla1funcsLoadStart),
               LOAD_END(_Cla1funcsLoadEnd),
               RUN_START(_Cla1funcsRunStart),
               LOAD_SIZE(_Cla1funcsLoadSize),
               PAGE = 0, ALIGN(8)

   Cla1Data : > CLA_DATA_RAM, PAGE = 1

   CLAscratch :
               { *.obj(CLAscratch)
               . += CLA_SCRATCHPAD_SIZE;
               *.obj(CLAscratch_end) } >  CLA_DATA_RAM, PAGE = 1

   .scratchpad : > CLA_DATA_RAM, PAGE = 1
   .bss_cla	   : > CLA_DATA_RAM, PAGE = 1
   .const_cla  :  LOAD = FLASHH,
                  RUN = CLA_DATA_RAM,
                  RUN_START(_Cla1ConstRunStart),
                  LOAD_START(_Cla1ConstLoadStart),
                  LOAD_SIZE(_Cla1ConstLoadSize),
                  PAGE = 1, ALIGN(8)
}

Hi Clecio,

Can you please try using EABi and check if you are still facing the issue (update the c2000 compiler flag in project properties to --abi=eabi )

Thanks

Aswin

Hi Aswin.

I tried EABI format and the warning disappeared (the conversion of the project wasn't that simple though).

Thanks for the tip.

What are the advantages of EABI over COFF? There is any risk in making the conversion of the project to this new format?

OK. Thanks!