Other Parts Discussed in Thread: C2000WARE, SYSCONFIG
I've been running into issues with writing to the X1_BOOTCTRL via DCSM. After piecing together documentation on the issue, the approach that seemed the most likely to work was to:
1. Import the "blinky_with_DCSM" example project for f2837xs in the c2000Ware support
2. Add the following above the main() in the "blinky_with_DCSM_cpu01.c" file
#pragma RETAIN(otp_z1_bootctrl)
#pragma DATA_SECTION(otp_z1_bootctrl,"dcsm_otp_z1_bootctrl");
const long otp_z1_bootctrl = 0xFFFF045A;
3. Compile and deploy the project via JTAG debug session.
I can see the value being retained in the memory map, but I'm not seeing the result get stored in the Z1_BOOTCTRL register in the memory map (over various methods for running and resetting the application).
dcsm_otp_z1_bootctrl
* 0 0007801c 00000002 DSECT
0007801c 00000002 blinky_cpu01.obj (dcsm_otp_z1_bootctrl:retain)
The value at 0x0005F004 remained 0xFFFFFFFF while viewing with the Memory Browser. I was also unable to directly edit this value in the memory browser, which was recommended in some forum postings.
After failing to write to the Z1_BOOTCTRL register, I decided to try to work around the issue using EMU_BOOTCTRL. I was able to edit the 0x0D00 location with 0x045A, however I ran into a breakpoint each time I tried to kick off a CPU reset from CCS. I did not notice any effect from a System Reset or a Restart command - the blinky application continued to execute as if there was no interruption.
The message upon reset was:
(Suspended - SW Breakpoint - A Reset Occurred On The Target)
I couldn't get the application to run past this point.
I should note that we configured the BOOTPIN0 and BOOTPIN1 pins for Get Mode (both high), using the default GPIO Pin 84 and Pin 72, respectively.
Is there any guidance or support on trying to enable SPI boot on the F28379S that could shed some light on this issue?