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Original question:

TMS320F28P650DK: I2C

TMS320F280039-Q1: GPACTRL causing I2C to misbehave

Jack Roy
Intellectual 1601 points

Part Number: TMS320F280039-Q1

Hi Team,

Customer ran into an issue where the EEPROM I2C was always low, and the bus busy was always 1. When doing a comparison to the example then noticed they had GPACTRL set to 0xFFFFFFFF, and on the example it was set to 0x00000000. Making this changed fixed the I2C and they were not sure why, or if this was actually the cause of the issue. Is there any relation between the GPACTRL and I2C functionality that would cause this?

Thanks!

-Jack

  • +1
    TI__Mastermind 20275 points

    Hi Jack,

    Glad the issue is resolved. The GPACTRL register sets the qualification sampling period for GPIO0 to GPIO31, so setting the register to 0xFFFFFFFF would mean the I2C on these pins were operating at a period of PLLSYSCLK/510. However, for communication peripherals such as I2C, the GPIO cannot be qualified since the peripheral itself is synchronized.

    The registers that follow are also a part of the input qualification scheme and modify attributes such as qualifier select, input inversion control, etc. More information about thiscan be found in the GPIO section of the TRM that I've linked here.

    Aishwarya