• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 82 subscribers
  • Views 135 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28388D: GPIO40

Yamini Thilaka
Prodigy 190 points

Part Number: TMS320F28388D

Hi,

Qshn is based on GPIO.

Suppose I have configured GPIO40 for Core1. Core1 can write into GPIO40. GPIO40 is configured for Core1. Can GPIO40 can be read by core2 also..?

Thanks,

Yamini

  • 0
    TI__Mastermind 30185 points

    Hello Yamini,

    Yamini Thilaka said:
    Can GPIO40 can be read by core2 also..?

    Yes, I believe reads of the GPyDAT register are possible from both CPUs, but writes are limited. Also, any configuration that needs to happen must be done on CPU1, CPU2 can only use the pin after CPU1 has configured it (if it needs to use it for something like a peripheral).