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Original question:

TMS320F28388D: Can the CLB be used as a transmit Shift register?

TMS320F280039C: CLB serializer with constant number of bit

Ga Ko
Prodigy 10 points
Part Number: TMS320F280039C
Other Parts Discussed in Thread: C2000WARE

Hi,

I would like to use the CLB core to analyse an input bit stream. I would like to shift the bit stream in a serialiser and then count the number of 1 present in this register. However, I would like that the number of bit stored in the shift register remains constant. Thus, when a new value is shifted in, the MSB must be removed from the register.

Is it possible to implement such a behavior? Must I use an interrupt routine to update the last counter without MSB?

Thanks in advance for your answer.

Best regards

  • 0
    TI__Mastermind 30185 points

    Hello,

    I will need to create an implementation on my side to double-check this, but I've run into an issue which I need to address first. I'll get back to you once I have that resolved.

  • 0
    TI__Mastermind 30185 points
    Ga Ko said:
    However, I would like that the number of bit stored in the shift register remains constant.

    Sorry, this part confuses me a little since I'm unfamiliar with this particular application. What is the shift register in this scenario? If you can create a diagram or representation of what you're trying to accomplish, that would help me understand the context for this question. Mainly, I'd like to know how data is getting to the CLB, what modules of the CLB are being used/how, how/if the data is being transferred back to the CPU (if your question is regarding one of these steps, let me know).

  • 0 in reply to Omer Amir
    Prodigy 10 points

    There s a data line and clock line connected to GPIO. Each rising edge of the clock, one bit is inserted in the serializer counter according to the data line state. The serializer counter should contain the last X bit that was measured the last X clock rising edge. When a new bit comes in, the last bit measured is cleared from the counter value (acting as a FIFO). At each new bit inserted, the counter value need to be processed to compute the number of 1 presents in the Serializer.

    I would like to know first of all if the behavior of the serializer that I described can be done with a serializer counter in any manner.

  • 0 in reply to Ga Ko
    TI__Mastermind 30185 points

    Hello,

    Ga Ko said:
    I would like to know first of all if the behavior of the serializer that I described can be done with a serializer counter in any manner.

    Have you already taken a look at clb_ex22_serializer? This example uses the CLB serializer like how you seem to be describing, with GPREG_0 representing the data line and GPREG_1 representing the clock line. The example can be found in C2000Ware_5_01_00_00\driverlib\f28003x\examples\clb.

  • 0 in reply to Omer Amir
    Prodigy 10 points

    Yes I have. I might be wrong but I think this example shows how to fill a counter used as a serializer but does not show how to remove a bit from the serializer as I need.

  • +1 in reply to Ga Ko
    TI__Mastermind 30185 points

    Hi,

    I see what you're saying, yes there is no existing feature like that in the CLB. If you wanted to shift bits out then you would need to use the HLC to push the counter value to the FIFO and from the CLB ISR/interrupt shift the bits out manually. If you need to understand how to use the HLC to send data from the CLB to the CPU, you can refer to example in C2000Ware_5_01_00_00\training\device\f28003x\advance_topics\lab_clb_ecap.