Other Parts Discussed in Thread: C2000WARE
Dear Sir,
I want to delay a singnal like the pic show below, using CLB. The delay time is configurable, I think we must need a counter in CLB to count if the delay match. For the counter, it gives out ZERO, MATCH1 and MATCH2. and when it's a counter, it will counts up/down during the input signal is HIGH, in this case we can only get a clock of MATCH1/2. I don't know how to make the counter output low or high during it counts to delay time, and once when it match the reference(delay time), it outputs high or low.
Please point out that if I miss understanding the logic. thanks.







