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Original question:

TMS320F28388D: OTP Memory address of Adc Calibaration function pointers

TMS320F28388D: Trouble with ADC Calibration using OTP functions in CPU2

Gary Krajewski
Prodigy 30 points
Part Number: TMS320F28388D

I am trying to calibrate the ADC peripheral (ADCA, ADCB, ADCC and ADCD) using the provided OTP calibration functions and the ADC_Setmode function. I am running this ADC calibration in CPU2 when CPU1 has finished initializing and gives CPU2 the OK to boot. 

My problem is that I see the appropriate calibration data in OTP (TI_OTP_DEV_KEY_BF, 0x5A5A) in CPU1 but when I look at the OTP addresses in CPU2, all I see are 0XFFFFs.

What am I missing? Does CPU2 have access to the ADC calibration data in the OTP that I see through the Memory Browser in CCS?

Thanks

  • 0
    TI__Genius 11071 points

    Hello Gary,

    ADC calibration needs to be run from CPU1. The calibration data is stored in CPU1 Flash and the routines are in CPU1 ROM. CPU2 does not have access to this data as the address spaces are exclusive.

    Best regards,
    Ibukun

  • 0 in reply to Ibukun Olumuyiwa
    Prodigy 30 points

    If CPU1 runs the ADC Calibration routines (SetMode), can ADC control then be changed to CPU2 and the TrimOffset in CPU2 ADC Registers are then calibrated?

    Or if we need to run ADC in CPU2, does the CPU1 OTP calibration data need to be copied from OTP to shared memory and then CPU2 can run the ADC Calibration using the new memory locations in shared memory?

    Thanks

  • 0 in reply to Gary Krajewski
    TI__Genius 11071 points

    Hello Gary,

    Sorry for the delayed response, I was out of office. You can run Adc_setMode() from CPU1. Once this is done the ADC is calibrated; it does not get reset when switching ownership to CPU2.

    Best regards,
    Ibukun