TMS320F28386D: How to launch CM core with 120Mhz main frequency by CPU1

jinzj39

I used below code to boot CM from CPU1 with 120MHz frequency, but it seemed that CM was still working at 125MHz. How to solve this issue?

#define CM_BOOT_FREQ_125MHZ 0x7D00U
#define CM_BOOT_FREQ_120MHZ 0x7800U

void Device_bootCM(uint32_t bootmode)
{
//
// Configure the CPU1TOCMIPCBOOTMODE register
//
IPC_setBootMode(IPC_CPU1_L_CM_R,
(BOOT_KEY | CM_BOOT_FREQ_120MHZ | bootmode));

//
// Set IPC Flag 0
//
IPC_setFlagLtoR(IPC_CPU1_L_CM_R, IPC_FLAG0);

//
// Bring CM out of reset. Wait for CM to go out of reset.
//
SysCtl_controlCMReset(SYSCTL_CORE_DEACTIVE);
while(SysCtl_isCMReset() == 0x1U);
}

over 2 years ago

0 Hareesh Janakiraman over 2 years ago

TI__Guru* 95315 points

Could you please clarify how you determined that CM is working at 125MHZ?
What is the input frequency to your device?

0 jinzj39 over 2 years ago in reply to Hareesh Janakiraman

Prodigy 70 points

I toggled one pin in the CM timer with 100us cycle time. If I used "#define CM_BOOT_FREQ_80MHZ 0x5A00U" and "define CM_CLK_FREQ 80000000". The cycle time is 64us.

Now I found the root cause, the definition of macro DEVICE_AUXSETCLOCK_CFG and DEVICE_AUXCLK_FREQ shall be changed accordingly.

It seems that the frequency setiing in IPC_setBootMode has no effect.

device.h

#define DEVICE_OSCSRC_FREQ 10000000U

#define DEVICE_AUXSETCLOCK_CFG (SYSCTL_AUXPLL_OSCSRC_XTAL | SYSCTL_AUXPLL_IMULT(48) | \
SYSCTL_REFDIV(1U) | SYSCTL_ODIV(4U) | \
SYSCTL_AUXPLL_DIV_1 | SYSCTL_AUXPLL_ENABLE | \
SYSCTL_DCC_BASE_0)

#define DEVICE_AUXCLK_FREQ ((DEVICE_OSCSRC_FREQ * 48) / (1 * 4 * 1))

cm.h

define CM_CLK_FREQ 120000000

0 Omer Amir over 2 years ago in reply to jinzj39

TI__Mastermind 30185 points

Hello,

The assigned expert is currently out-of-office, please expect a reply sometime Tuesday.

0 Siddharth Deshpande over 2 years ago in reply to Omer Amir

TI__Mastermind 37415 points

Hi,

The IPC_setBootMode does not configure the CM Clock, This has to be done separately as you have mentioned. The CM clock is derived from PLLSYSCLK or AUXPLLRAWCLK and then divided down by the CMCLK divider.

Best Regards

Siddharth

0 jinzj39 over 2 years ago in reply to Siddharth Deshpande

Prodigy 70 points

Hi,

If the AUXPLLRAWCLK is configured to 120MHz, and CM core runs at the frequency of 120MHz，which value shall be set to "CM Device Frequency" in IPC_SetBootMode? what's the purpose of this setting（CM Device Frequency）?

Best Regards,

Jason

+1 Siddharth Deshpande over 2 years ago in reply to jinzj39

TI__Mastermind 37415 points

Jason,

The IPC_SetBootMode function only sets the CM Boot mode and not the CM device frequency. Hence this API cannot be used for CM clock configuration.

Best Regards

Siddharth

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TMS320F28386D: How to launch CM core with 120Mhz main frequency by CPU1