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LAUNCHXL-F28379D: Functional Safety with dual core CPUs f2837xD or F2838xD

Bui Van Linh
Intellectual 660 points
Part Number: LAUNCHXL-F28379D

Hello experts,


I read the technical document SFFS022

I noticed that only the 1oo1D security architecture is mentioned in relation to the dual-core microcontroller TMS320F2838xD. I'm wondering if a 1oo2 security architecture is feasible with this dual-core microcontroller or not.
I imagine the following application. A motor with 2 encoders is powered by a power amplifier with TMS320F2838xD.

The first channel: The motor control and motion function are implemented on the first core (CPU + CLA). This core uses the positions from the first encoder.
The second channel: The second core (CPU + CLA) reads the second encoder to monitor the motor position.

By comparing the positions from these two channels, it is possible to implement not only STO (Safe Torque Off) but also SS1 (Safe Stop 1), SOS (Safe Operating Stop), SLS (Safe Limiting Speed) or SDI (Safe Direction). All of these operating modes already require safety architecture 1oo2. This means that SIL3 is also possible.

Am I right with my train of thought here or am I making a mistake somewhere?

Many thanks in advance and best regards

Bui

  • +1
    Intellectual 660 points

    Hello experts,

    in the meantime I have read a lot more about functional safety and was at a specialized fair last week and was lucky enough to meet a very competent TI employee. He told me a lot about functional safety in drive technology. Now I know how uninformed I was. It's no wonder that I haven't received an answer to my question yet. 

    Best regards - Bui