I already know the wiring connection for TI's EMIF2 EtherCAT example above below

In the design using 16 bits for the EMIF1, is the wiring as shown in the diagram correct?

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I already know the wiring connection for TI's EMIF2 EtherCAT example above below

In the design using 16 bits for the EMIF1, is the wiring as shown in the diagram correct?

Hello,
The expert is on leave. Please expect a reply by 1st April.
Thanks & Regards,
Sinchita
Sorry, what's the reason that the ADR[0] bit is grounded on the ET1100? Is this some requirement for that device?