Hi,
I want to perform peak current mode control for interleaved totem pole pfc. But cycle by cycle peak current control do not work correctly. I use CMPSS1 for one phase and CMPSS2 for the other phase in interleaved PFC. Also, I use high comparator for positive grid voltage and low comparator for negative grid voltage in every CMPSS. Then, every CMPSS connect to EPWM with combinational trip. My CMPSS and EPWM settings is like following. In addition, I swap EPWMA and EPWMB with 100kHz ISR in grid voltage zero crossing regions. For open loop operation, I load the constant value to DACs. But the code is not showing any reaction.
Could you please check the correctness of my code ?
For CMPSS;
void setupPCMCCMPSS(void)
{
CMPSS_enableModule(PCMC_IL1_CMPSS_BASE);
CMPSS_enableModule(PCMC_IL2_CMPSS_BASE);
CMPSS_configHighComparator(PCMC_IL1_CMPSS_BASE,CMPSS_INSRC_DAC);
CMPSS_configHighComparator(PCMC_IL2_CMPSS_BASE,CMPSS_INSRC_DAC);
CMPSS_configLowComparator(PCMC_IL1_CMPSS_BASE,CMPSS_INSRC_DAC | CMPSS_INV_INVERTED);
CMPSS_configLowComparator(PCMC_IL2_CMPSS_BASE,CMPSS_INSRC_DAC | CMPSS_INV_INVERTED);
ASysCtl_selectCMPHPMux(PCMC_IL1_CMPSS_ASYSCTRL_CMPHPMUX,
PCMC_IL1_CMPSS_ASYSCTRL_MUX_VALUE);
ASysCtl_selectCMPHPMux(PCMC_IL2_CMPSS_ASYSCTRL_CMPHPMUX,
PCMC_IL2_CMPSS_ASYSCTRL_MUX_VALUE);
ASysCtl_selectCMPLPMux(PCMC_IL1_CMPSS_ASYSCTRL_CMPLPMUX,
PCMC_IL1_CMPSS_ASYSCTRL_MUX_VALUE);
ASysCtl_selectCMPLPMux(PCMC_IL2_CMPSS_ASYSCTRL_CMPLPMUX,
PCMC_IL2_CMPSS_ASYSCTRL_MUX_VALUE);
CMPSS_configBlanking(PCMC_IL1_CMPSS_BASE, 2);
CMPSS_configBlanking(PCMC_IL2_CMPSS_BASE, 3);
CMPSS_enableBlanking(PCMC_IL1_CMPSS_BASE);
CMPSS_enableBlanking(PCMC_IL2_CMPSS_BASE);
CMPSS_configDAC(PCMC_IL1_CMPSS_BASE,(CMPSS_DACVAL_PWMSYNC | CMPSS_DACREF_VDDA | CMPSS_DACSRC_SHDW));
CMPSS_configDAC(PCMC_IL2_CMPSS_BASE,(CMPSS_DACVAL_PWMSYNC | CMPSS_DACREF_VDDA | CMPSS_DACSRC_SHDW));
CMPSS_setDACValueHigh(PCMC_IL1_CMPSS_BASE,2048);
CMPSS_setDACValueHigh(PCMC_IL2_CMPSS_BASE,2048);
CMPSS_setDACValueLow(PCMC_IL1_CMPSS_BASE,2048);
CMPSS_setDACValueLow(PCMC_IL2_CMPSS_BASE,2048);
CMPSS_configOutputsHigh(PCMC_IL1_CMPSS_BASE, CMPSS_TRIP_ASYNC_COMP);
CMPSS_configOutputsHigh(PCMC_IL2_CMPSS_BASE, CMPSS_TRIP_ASYNC_COMP);
CMPSS_configOutputsLow(PCMC_IL1_CMPSS_BASE, CMPSS_TRIP_ASYNC_COMP);
CMPSS_configOutputsLow(PCMC_IL2_CMPSS_BASE, CMPSS_TRIP_ASYNC_COMP);
CMPSS_clearFilterLatchHigh(PCMC_IL1_CMPSS_BASE);
CMPSS_clearFilterLatchHigh(PCMC_IL2_CMPSS_BASE);
CMPSS_clearFilterLatchLow(PCMC_IL1_CMPSS_BASE);
CMPSS_clearFilterLatchLow(PCMC_IL2_CMPSS_BASE);
}
For EPWM;
void setup_ILC_PFC_FBPWM(uint32_t base1, uint32_t base2, uint32_t base3,
uint16_t pwm_period_ticks,
uint16_t pwm_db_ticks_ls, uint16_t pwm_db_ticks_hs)
{
EPWM_setPeriodLoadMode(base1,EPWM_PERIOD_SHADOW_LOAD);
EPWM_setTimeBasePeriod(base1,pwm_period_ticks - 1);
EPWM_setTimeBaseCounter(base1,0);
EPWM_setPhaseShift(base1,0);
EPWM_setTimeBaseCounterMode(base1,EPWM_COUNTER_MODE_UP);
EPWM_setClockPrescaler(base1,EPWM_CLOCK_DIVIDER_1,EPWM_HSCLOCK_DIVIDER_1);
EPWM_setCounterCompareValue(base1,EPWM_COUNTER_COMPARE_A,2);
EPWM_disableCounterCompareShadowLoadMode(base1,EPWM_COUNTER_COMPARE_A);
HWREGH(base1 + EPWM_O_AQCTLA) =0 ;
EPWM_disablePhaseShiftLoad(base1);
//EPWM_setSyncOutPulseMode(base1, EPWM_SYNC_OUT_PULSE_ON_COUNTER_ZERO);
EPWM_setPeriodLoadMode(base2,EPWM_PERIOD_SHADOW_LOAD);
EPWM_setTimeBasePeriod(base2,pwm_period_ticks - 1);
EPWM_setTimeBaseCounter(base2,0);
EPWM_setPhaseShift(base2,0);
EPWM_setTimeBaseCounterMode(base2,EPWM_COUNTER_MODE_UP);
EPWM_setClockPrescaler(base2,EPWM_CLOCK_DIVIDER_1,EPWM_HSCLOCK_DIVIDER_1);
EPWM_setPeriodLoadMode(base3,EPWM_PERIOD_SHADOW_LOAD);
EPWM_setTimeBasePeriod(base3,pwm_period_ticks - 1);
EPWM_setTimeBaseCounter(base3,0);
EPWM_setPhaseShift(base3,0);
EPWM_setTimeBaseCounterMode(base3,EPWM_COUNTER_MODE_UP);
EPWM_setClockPrescaler(base3,EPWM_CLOCK_DIVIDER_1,EPWM_HSCLOCK_DIVIDER_1);
HWREGH(base2 + EPWM_O_AQCTLA) =0 ;
HWREGH(base3 + EPWM_O_AQCTLA) =0 ;
EPWM_setActionQualifierAction(base2, EPWM_AQ_OUTPUT_A ,
EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
EPWM_setActionQualifierAction(base3, EPWM_AQ_OUTPUT_A ,
EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
EPWM_setActionQualifierAction(base2, EPWM_AQ_OUTPUT_B ,
EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
EPWM_setActionQualifierAction(base3, EPWM_AQ_OUTPUT_B ,
EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_TIMEBASE_ZERO);
EPWM_setActionQualifierAction(base2, EPWM_AQ_OUTPUT_A ,
EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_T1_COUNT_UP);
EPWM_setActionQualifierAction(base3, EPWM_AQ_OUTPUT_A ,
EPWM_AQ_OUTPUT_HIGH, EPWM_AQ_OUTPUT_ON_T2_COUNT_UP);
EPWM_setActionQualifierAction(base2, EPWM_AQ_OUTPUT_B ,
EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_T1_COUNT_UP);
EPWM_setActionQualifierAction(base3, EPWM_AQ_OUTPUT_B ,
EPWM_AQ_OUTPUT_LOW, EPWM_AQ_OUTPUT_ON_T2_COUNT_UP);
EPWM_setActionQualifierT1TriggerSource(base2,
EPWM_AQ_TRIGGER_EVENT_TRIG_DC_EVTFILT);
EPWM_setActionQualifierT2TriggerSource(base3,
EPWM_AQ_TRIGGER_EVENT_TRIG_DC_EVTFILT);
XBAR_enableEPWMMux(XBAR_TRIP5, 0x00);
XBAR_enableEPWMMux(XBAR_TRIP7, 0x00);
XBAR_setEPWMMuxConfig(XBAR_TRIP5,
PCMC_CMPSS1_XBAR_MUX_VAL_1);
XBAR_setEPWMMuxConfig(XBAR_TRIP7,
PCMC_CMPSS2_XBAR_MUX_VAL_1);
XBAR_enableEPWMMux(XBAR_TRIP5,
PCMC_CMPSS1_XBAR_MUX_1);
XBAR_enableEPWMMux(XBAR_TRIP7,
PCMC_CMPSS2_XBAR_MUX_1);
EPWM_selectDigitalCompareTripInput(base2, EPWM_DC_TRIP_COMBINATION, EPWM_DC_TYPE_DCAH);
EPWM_selectDigitalCompareTripInput(base2, EPWM_DC_TRIP_COMBINATION, EPWM_DC_TYPE_DCAL);
EPWM_selectDigitalCompareTripInput(base2, EPWM_DC_TRIP_COMBINATION, EPWM_DC_TYPE_DCBH);
EPWM_selectDigitalCompareTripInput(base2, EPWM_DC_TRIP_COMBINATION, EPWM_DC_TYPE_DCBL);
EPWM_selectDigitalCompareTripInput(base3, EPWM_DC_TRIP_COMBINATION, EPWM_DC_TYPE_DCAH);
EPWM_selectDigitalCompareTripInput(base3, EPWM_DC_TRIP_COMBINATION, EPWM_DC_TYPE_DCAL);
EPWM_selectDigitalCompareTripInput(base3, EPWM_DC_TRIP_COMBINATION, EPWM_DC_TYPE_DCBH);
EPWM_selectDigitalCompareTripInput(base3, EPWM_DC_TRIP_COMBINATION, EPWM_DC_TYPE_DCBL);
EPWM_enableDigitalCompareTripCombinationInput(base2, EPWM_DC_COMBINATIONAL_TRIPIN5 | EPWM_DC_COMBINATIONAL_TRIPIN7, EPWM_DC_TYPE_DCAH);
EPWM_enableDigitalCompareTripCombinationInput(base2, EPWM_DC_COMBINATIONAL_TRIPIN5 | EPWM_DC_COMBINATIONAL_TRIPIN7, EPWM_DC_TYPE_DCAL);
EPWM_enableDigitalCompareTripCombinationInput(base2, EPWM_DC_COMBINATIONAL_TRIPIN5 | EPWM_DC_COMBINATIONAL_TRIPIN7, EPWM_DC_TYPE_DCBH);
EPWM_enableDigitalCompareTripCombinationInput(base2, EPWM_DC_COMBINATIONAL_TRIPIN5 | EPWM_DC_COMBINATIONAL_TRIPIN7, EPWM_DC_TYPE_DCBL);
EPWM_enableDigitalCompareTripCombinationInput(base3, EPWM_DC_COMBINATIONAL_TRIPIN5 | EPWM_DC_COMBINATIONAL_TRIPIN7, EPWM_DC_TYPE_DCAH);
EPWM_enableDigitalCompareTripCombinationInput(base3, EPWM_DC_COMBINATIONAL_TRIPIN5 | EPWM_DC_COMBINATIONAL_TRIPIN7, EPWM_DC_TYPE_DCAL);
EPWM_enableDigitalCompareTripCombinationInput(base3, EPWM_DC_COMBINATIONAL_TRIPIN5 | EPWM_DC_COMBINATIONAL_TRIPIN7, EPWM_DC_TYPE_DCBH);
EPWM_enableDigitalCompareTripCombinationInput(base3, EPWM_DC_COMBINATIONAL_TRIPIN5 | EPWM_DC_COMBINATIONAL_TRIPIN7, EPWM_DC_TYPE_DCBL);
EPWM_setTripZoneDigitalCompareEventCondition(base2,
EPWM_TZ_DC_OUTPUT_A2,
EPWM_TZ_EVENT_DCXH_HIGH);
EPWM_setTripZoneDigitalCompareEventCondition(base2,
EPWM_TZ_DC_OUTPUT_B2,
EPWM_TZ_EVENT_DCXH_HIGH);
EPWM_setTripZoneDigitalCompareEventCondition(base3,
EPWM_TZ_DC_OUTPUT_A2,
EPWM_TZ_EVENT_DCXL_HIGH);
EPWM_setTripZoneDigitalCompareEventCondition(base3,
EPWM_TZ_DC_OUTPUT_B2,
EPWM_TZ_EVENT_DCXL_HIGH);
EPWM_setDigitalCompareEventSource(base2, EPWM_DC_MODULE_A, EPWM_DC_EVENT_2,
EPWM_DC_EVENT_SOURCE_FILT_SIGNAL);
EPWM_setDigitalCompareEventSource(base3, EPWM_DC_MODULE_A, EPWM_DC_EVENT_2,
EPWM_DC_EVENT_SOURCE_FILT_SIGNAL);
EPWM_setDigitalCompareEventSource(base2, EPWM_DC_MODULE_B, EPWM_DC_EVENT_2,
EPWM_DC_EVENT_SOURCE_FILT_SIGNAL);
EPWM_setDigitalCompareEventSource(base3, EPWM_DC_MODULE_B, EPWM_DC_EVENT_2,
EPWM_DC_EVENT_SOURCE_FILT_SIGNAL);
EPWM_setDigitalCompareEventSyncMode(base2, EPWM_DC_MODULE_A,
EPWM_DC_EVENT_2,
EPWM_DC_EVENT_INPUT_NOT_SYNCED);
EPWM_setDigitalCompareEventSyncMode(base3, EPWM_DC_MODULE_A,
EPWM_DC_EVENT_2,
EPWM_DC_EVENT_INPUT_NOT_SYNCED);
EPWM_setDigitalCompareEventSyncMode(base2, EPWM_DC_MODULE_B,
EPWM_DC_EVENT_2,
EPWM_DC_EVENT_INPUT_NOT_SYNCED);
EPWM_setDigitalCompareEventSyncMode(base3, EPWM_DC_MODULE_B,
EPWM_DC_EVENT_2,
EPWM_DC_EVENT_INPUT_NOT_SYNCED);
EPWM_enableTripZoneSignals(base2, EPWM_TZ_SIGNAL_DCAEVT2 | EPWM_TZ_SIGNAL_DCBEVT2);
EPWM_enableTripZoneSignals(base3, EPWM_TZ_SIGNAL_DCAEVT2 | EPWM_TZ_SIGNAL_DCBEVT2);
EPWM_enableDigitalCompareBlankingWindow(base2);
EPWM_enableDigitalCompareBlankingWindow(base3);
EPWM_setDigitalCompareFilterInput(base2, EPWM_DC_WINDOW_SOURCE_DCAEVT2);
EPWM_setDigitalCompareFilterInput(base3, EPWM_DC_WINDOW_SOURCE_DCAEVT2);
EPWM_setDigitalCompareFilterInput(base2, EPWM_DC_WINDOW_SOURCE_DCBEVT2);
EPWM_setDigitalCompareFilterInput(base3, EPWM_DC_WINDOW_SOURCE_DCBEVT2);
EPWM_setDigitalCompareBlankingEvent(base2, EPWM_DC_WINDOW_START_TBCTR_ZERO);
EPWM_setDigitalCompareBlankingEvent(base3, EPWM_DC_WINDOW_START_TBCTR_ZERO);
EPWM_setDigitalCompareWindowOffset(base2, pwm_period_ticks - 5);
EPWM_setDigitalCompareWindowOffset(base3, pwm_period_ticks - 5);
EPWM_setDigitalCompareWindowLength(base2, 10);
EPWM_setDigitalCompareWindowLength(base3, 10);
EPWM_setTripZoneAction(base2, EPWM_TZ_ACTION_EVENT_TZA,
EPWM_TZ_ACTION_LOW);
EPWM_setTripZoneAction(base2, EPWM_TZ_ACTION_EVENT_TZB,
EPWM_TZ_ACTION_LOW);
EPWM_setTripZoneAction(base3, EPWM_TZ_ACTION_EVENT_TZA,
EPWM_TZ_ACTION_LOW);
EPWM_setTripZoneAction(base3, EPWM_TZ_ACTION_EVENT_TZB,
EPWM_TZ_ACTION_LOW);
EPWM_selectCycleByCycleTripZoneClearEvent(base2,
EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO_PERIOD);
EPWM_selectCycleByCycleTripZoneClearEvent(base3,
EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO_PERIOD);
EPWM_enableTripZoneInterrupt(base2, EPWM_TZ_INTERRUPT_DCAEVT2 | EPWM_TZ_INTERRUPT_DCBEVT2);
EPWM_enableTripZoneInterrupt(base3, EPWM_TZ_INTERRUPT_DCAEVT2 | EPWM_TZ_INTERRUPT_DCBEVT2);
EPWM_clearTripZoneFlag(base2, (EPWM_TZ_INTERRUPT_OST | EPWM_TZ_SIGNAL_DCBEVT1));
EPWM_clearTripZoneFlag(base3, (EPWM_TZ_INTERRUPT_OST | EPWM_TZ_SIGNAL_DCBEVT1));
// Dead band generator
EPWM_setDeadBandControlShadowLoadMode(base2, EPWM_DB_LOAD_ON_CNTR_ZERO);
EPWM_setDeadBandControlShadowLoadMode(base3, EPWM_DB_LOAD_ON_CNTR_ZERO);
EPWM_setRisingEdgeDelayCountShadowLoadMode(base2,
EPWM_RED_LOAD_ON_CNTR_PERIOD);
EPWM_setRisingEdgeDelayCountShadowLoadMode(base3,
EPWM_RED_LOAD_ON_CNTR_PERIOD);
EPWM_setFallingEdgeDelayCountShadowLoadMode(base2,
EPWM_FED_LOAD_ON_CNTR_ZERO);
EPWM_setFallingEdgeDelayCountShadowLoadMode(base3,
EPWM_FED_LOAD_ON_CNTR_ZERO);
//
// Active high complementary PWMs - Set up the deadband
//
EPWM_setDeadBandCounterClock(base2, EPWM_DB_COUNTER_CLOCK_FULL_CYCLE);
EPWM_setRisingEdgeDelayCount(base2, pwm_db_ticks_hs);
EPWM_setFallingEdgeDelayCount(base2, pwm_db_ticks_hs);
EPWM_setDeadBandDelayMode(base2, EPWM_DB_RED, true);
EPWM_setDeadBandDelayMode(base2, EPWM_DB_FED, true);
EPWM_setRisingEdgeDeadBandDelayInput(base2, EPWM_DB_INPUT_EPWMA);
EPWM_setFallingEdgeDeadBandDelayInput(base2, EPWM_DB_INPUT_EPWMA);
EPWM_setDeadBandDelayPolarity(base2, EPWM_DB_FED,
EPWM_DB_POLARITY_ACTIVE_LOW);
EPWM_setDeadBandDelayPolarity(base2, EPWM_DB_RED,
EPWM_DB_POLARITY_ACTIVE_HIGH);
EPWM_setDeadBandCounterClock(base3, EPWM_DB_COUNTER_CLOCK_FULL_CYCLE);
EPWM_setRisingEdgeDelayCount(base3, pwm_db_ticks_hs);
EPWM_setFallingEdgeDelayCount(base3, pwm_db_ticks_hs);
EPWM_setDeadBandDelayMode(base3, EPWM_DB_RED, true);
EPWM_setDeadBandDelayMode(base3, EPWM_DB_FED, true);
EPWM_setRisingEdgeDeadBandDelayInput(base3, EPWM_DB_INPUT_EPWMA);
EPWM_setFallingEdgeDeadBandDelayInput(base3, EPWM_DB_INPUT_EPWMA);
EPWM_setDeadBandDelayPolarity(base3, EPWM_DB_FED,
EPWM_DB_POLARITY_ACTIVE_LOW);
EPWM_setDeadBandDelayPolarity(base3, EPWM_DB_RED,
EPWM_DB_POLARITY_ACTIVE_HIGH);
EPWM_disablePhaseShiftLoad(base1);
EPWM_setSyncOutPulseMode(base1, EPWM_SYNC_OUT_PULSE_ON_COUNTER_ZERO);
EPWM_enablePhaseShiftLoad(base2);
EPWM_setSyncOutPulseMode(base2, EPWM_SYNC_OUT_PULSE_ON_SOFTWARE);
EPWM_setPhaseShift(base2, 2 );
EPWM_setCountModeAfterSync(base2, EPWM_COUNT_MODE_UP_AFTER_SYNC);
EPWM_enablePhaseShiftLoad(base3);
EPWM_setSyncOutPulseMode(base3, EPWM_SYNC_OUT_PULSE_ON_SOFTWARE);
EPWM_setPhaseShift(base3,
(2 + (uint16_t)((float)pwm_period_ticks / (float)(2.0))));
EPWM_setCountModeAfterSync(base3, EPWM_COUNT_MODE_UP_AFTER_SYNC);
EPWM_setActionQualifierContSWForceShadowMode(base1,
EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO);
EPWM_setActionQualifierContSWForceShadowMode(base2,
EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO);
EPWM_setActionQualifierContSWForceShadowMode(base3,
EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO);
}
