This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28P650DK: Bissc CLB logic

Part Number: TMS320F28P650DK

Hi,

I'm trying to implement CLB logic for clock generation of Bissc and SPI clock, but in implemetation of CLB logic, I'm confused and wanted to know if some can help me for the CLB logic?
I tried to use this article https://www.mdpi.com/2079-9292/12/4/886 , but there is one FSM0 and COUNTER 0 logic is missing.

Thanks.

  • Hello, unfortunately I won't be able to help with this article. It's possible that the FSM or counter was not used in their design.

    If you have a general question about the CLB please let me know.