Hi,
I'm trying to implement CLB logic for clock generation of Bissc and SPI clock, but in implemetation of CLB logic, I'm confused and wanted to know if some can help me for the CLB logic?
I tried to use this article https://www.mdpi.com/2079-9292/12/4/886 , but there is one FSM0 and COUNTER 0 logic is missing.
Thanks.
