Part Number: TMS320F28377D
Hi,
In the Datasheet (SPRS880O), "Table 9-5. Peripheral Registers Memory Map", the table implies that ADC result registers are not protected? What does that actually mean?
If CPU reads the results register without checking the busy bits of the ADC, and if ADC has not finished the conversion, will CPU read half baked value (half new/half previous value) or just previous value?
Thank you.
