This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320F28388D: Issue with Copying Struct from CPU2 to CLA

Part Number: TMS320F28388D

Greetings,

I am encountering an issue with copying a struct from CPU2 to the CLA (Control Law Accelerator), and I'm seeking some insights on how to resolve it.

Here's a brief overview of the problem:

I have a struct defined on the CPU2, located in the shared memory between the CPU2 and the CLA. This struct contains an array of 3 axes, and each axis has variables for index and active.

I am setting the values for this struct in the CPU2, and then attempting to copy them to my CLA for further processing.

Here is an example snippet of my CLA code with modifications for debugging:

 for (axis = (NUMBER_OF_AXIS-1); axis >= 0; axis--)
    {
     output->debugCLA1[axis] = (axis + 1) * 10.0f + (float32)myStruct.axis[axis].active;
     
     }

After executing this code, the resulting values in output->debugCLA1 are:

  1. 11.0
  2. 20.0
  3. 31.0

However, the correct result should be that the second value is 21 instead of 20.

I have verified that myStruct.axis[axis].active has the correct values on the CPU2 side. Additionally, I have confirmed that the values are correctly saved at the same location in both the CLA and CPU2 (as seen in the Expressions window).

Since I have already ensured the correctness of the value on the CPU2 side and confirmed the correct values for axis (as evident by the values 10, 20, 30 in output->debugCLA1), I suspect that there might be an issue in the way the struct is being saved, resulting in limited access for the CLA.

The struct is saved in the LSRAM with the following configuration:

MemCfgRegs.LSxMSEL.bit.MSEL_LS0     =  0x01;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS0 = 0x0;

MemCfgRegs.LSxMSEL.bit.MSEL_LS1     =  0x01;
MemCfgRegs.LSxCLAPGM.bit.CLAPGM_LS1 = 0x0;

/*RAMLS0           : origin = 0x008000, length = 0x000800
   RAMLS1           : origin = 0x008800, length = 0x000800*/
   CLA_CPU_SHARED   : origin = 0x008000, length = 0x001000

I would greatly appreciate any insights, suggestions, or potential solutions you might have regarding this issue.

Thank you in advance for your time and assistance.

Best regards,

Wilko

P.S. Thank you for your previous clarifications. I originally thought that there is a problem with adressing the right memory but I have padded all the pointers and as you have pointed out the Compiler handles variables that are smaller than 32 Bits correctly. 

  • Hi Wilko,

    I'm glad to hear my previous clarifications were helpful Slight smile

    Your LSRAM memory configurations look correct here. I'm assuming you are placing the CLA program memory in a different LSRAM as well and giving the CLA access to this portion of memory? What data types are you using for the axis, index, and active variables? Have you tried stepping through the code on the CLA side and verifying the computations in the debugger watch window? For debugging purposes, it may also help to separate each operation into different lines so you can see which one (if any) is having an issue.

    Best Regards,

    Delaney

  • Hi Delaney,

    I believe I've identified the issue.

    Upon dissecting the struct, I discovered an enum.

    Due to enums being interpreted as int, there arose a mismatch in communication between the CPU and CLA. As a  fix, I've defined macros for the enum members.

    Would you suggest a more effective solution, or is this approach suitable?

    Best Regards,

    Wilko

  • Hi Wilko,

    This approach should be suitable, good to hear you found the root of the issue. Let me know if you have any more questions.

    Best Regards,

    Delaney