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TMS320F28379S: HW design on emulation and standalone boot

Johnny Chen
Expert 4960 points
Part Number: TMS320F28379S

Hi Champ,

I am asking for my customer.

They are designing their own daughter card with F28379S, then insert the daughter card into their PSU.

Since we will debug the device via in CCS debug mode in the beginning, and once finished the all peripherals validation, they will finally run the device in standalone mode with flash boot in PSU, and only connect JTAG for re-programming the fw code, rarely need debug via JTAG in CCS debug mode anymore.

So, in the beginning for the hw design, we should have them to put a switch or externally reserve a pull high/low circuit on TRST pin in advance, to switch the TRST pin status from 1 to 0, correct ? 

Thanks and regards,

Johnny

  • +1
    TI__Mastermind 36526 points

    Hi Johnny,

    Generally, we advise customers to simply use a pulldown resistor on TRST. When the debug probe is communicating with the device, it will pull TRST high. Otherwise, TRST will go low.

    I believe we recommend resistors between 2.2k ohm and 10k ohm. 

    Best Regards,

    Ben Collier

  • 0 in reply to Benjamin Collier
    TI__Expert 4960 points

    Hi Ben,

    I agree that we generally advise to put a pulldown resistor on TRST, but in that way, the device can't communicate with JTAG in run time in CCS debug mode, correct ? 

    As I mentioned, user would use JTAG to debug in the early stage development, then have the device run in standalone once it's ready to MP. Considering their developing situation, to design the HW in very early stage, shouldn't reserve the pull up on TRST, pin ? or the probe would still able to pull TRST high even there is a pull-low resistor there and communicate with device in CCS debug mode ?

    Kindly help clarify it, thanks.

    Johnny

  • +1 in reply to Johnny Chen
    TI__Mastermind 36526 points

    Johnny,

    Johnny Chen said:
    I agree that we generally advise to put a pulldown resistor on TRST, but in that way, the device can't communicate with JTAG in run time in CCS debug mode, correct ? 

    This is not correct. If the resistor value is chosen correctly, the debug probe will pull TRST high when CCS is connected to the device. Feel free to check the launchpad schematic if you would like to see an example of this.

    Best Regards,

    Ben Collier