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TMS320F28P650DK: CMPSS:The relationship between the CMPSS output and the sampling rate of the ADC?

xiaonan wang
Prodigy 20 points
Part Number: TMS320F28P650DK

Hello everyone,

Recently I am using CMPSS for AC current CBC protection, its negative input is a fixed threshold of 80A, and the positive input is ADC sampling, and I found that sometimes the current exceeds 80A in a short period of time will not trigger the protection of CMPSS, so I want to know if the output of CMPSS is limited by the sampling rate of ADC?

I still have a doubt about the sampling rate of the ADC, that is, the ADC port is a real-time value, is the data captured as the system clock, and the conversion will be maintained after the trigger source appears?

  • 0
    TI__Expert 7100 points

    Hello,

    I need more information for debug. Please let me know which pin you are using for positive input. 

    Regards,

    Hadi

  • 0 in reply to Hadi Moradisizkoohi
    Prodigy 20 points

    Hi,

    The PIN23-C1/PIN42-A1/PIN47-B1.

    My understanding is that the positive input of CMPSS is ADC, and the threshold of comparison is digital, so that means that the positive comparison value must be the digital quantity converted by ADC，Doesn't that mean that the comparison of CMPSS must be related to the sampling and conversion trigger source of the ADC?

  • 0 in reply to xiaonan wang
    TI__Expert 7100 points

    Hi Xiaonan,

    Are you seeing the same behavior in all of these pins?

    I'm asking because pins PIN42-A1/PIN47-B1 are AIO but pin PIN23-C1 has AGPIO function. For AGPIO pins, the performance of CMPSS module is affected by ADC sampling.

    Regards,

    Hadi

  • 0 in reply to Hadi Moradisizkoohi
    Prodigy 20 points

    Hi Hadi，

    I'm sorry for not looking at the phenomenon of other pins.

    Recently, I read the manual and found that I may have misunderstood, because the negative threshold of cmpss is actually not a digital amount but an analog amount of 0-3.3V converted by DAC, so it may be that the judgment period of cmpss is the system time, and the point that has been confused before is that the judgment period of cmpss is after ADC conversion, that is, the period of the trigger source of ADC, which is too slow. Maybe you can tell me how you understand the trigger cycle of CMPSS.

    Have a nice day，

    xiaonan

  • 0 in reply to xiaonan wang
    TI__Expert 7100 points

    Hi Xiaonan,

    The comparator has no such trigger requirement or sample time, it is continuously monitoring the analog signal.

    The pin is always monitored against the comparison value given by DAC. Please remember that each CMPSS comparator is provided with its own voltage reference DAC. The DAC can come from shadow register or ramp generator (shown in Figure 20-1 in TRM).

    Regards,

    Hadi