TMDSCNCD28388D: Ethernet

Hi, 

This is a low level driver example.   This example programs the Ethernet module in Internal Loop back mode and hence needs no external connection. 

Before running this example ,  you need to load the C28x core with the "ethernet_c28x_config" project . This is required since C28x is the master core on this device and has to configure the clock. After this , you can load the  "ethernet_ex1_basic_tx_rx_loopback" code on the CM core and then run it.

Best Regards

Siddharth

Hello Siddharth 

(1) How I load code into cm core

(2) Can i add sys config in  ethernet_c28x_config project.

Thanks

Hello Sudhir

Sorry for delayed response. I was out of office for the last one week and hence wasn;t to reply earlier.

Once you launch the debug session in CCS,  it will list all the cores that the device has. You will have to first connect to C28x core , load the ethernet_c28x_config binary, run the code . After this, you can connect to the CM core and then load the ethernet_ex1_basic_tx_rx_loopback binary and run the code.

Best Regards

Siddharth

Hello Siddharth,

Now problem is when I run ethernet in debug my ethernet module respond but when I burn the code than its not respond .

These steps I follow to burn the code.

(1) I burn ethernet configuration in cpu1

(2) burn ethernet_ex1_basic_tx_rx_loopback in Cm core.

but my ethernet module is not work.

Thanks

Hi Sudhir

You mean that you are able to run from RAM but when you run from Flash, it doesn't work. Is this correct? 

 Can you look at  the stats variable in the Watch window in CCS and share it?

Best Regards

Siddharth

Hi Siddharth 

I mean that when I debug the code my ethernet work but when I burn the code my ethernet not working.

thanks

Hi Sudhir

By burning , do you mean running the code from Flash after a power on reset?

Best Regards

Siddharth

Hi Siddharth  

My problem is ethernet working fine in debugging mode but whenever flash memory burn the ethernet is not working 

Thanks

Hi Sudhir, 

CPU1 is the master core in this device and has to boot the CM core.  

Did you ensure that the build configuration is set to "CPU1_FLASH" for the ethernet_c28x_config and "CM_FLASH" for the ethernet example project ?

Can you debug and see where the code execution is stuck ?  For this, instead of Run->load program , you can use Run-> load symbols in CCS.

Best Regards

Siddharth

Hi Siddharth ,

When I run the code in debug my ethernet respond but when I burn the code ethernet not respond.

 Yes build configuration is set to "CPU1_FLASH" for the ethernet_c28x_config and "CM_FLASH" for the ethernet example project

int
main(void)
{

#ifdef _FLASH
Device_bootCM(BOOTMODE_BOOT_TO_FLASH_SECTOR0);
#else
Device_bootCM(BOOTMODE_BOOT_TO_S0RAM);
#endif
unsigned long ulUser0, ulUser1;
unsigned char pucMACArray[8];

int i=0;

GPIO_setPadConfig(69, GPIO_PIN_TYPE_STD);
GPIO_setDirectionMode(69, GPIO_DIR_MODE_OUT);

//
// Configure CPU2 to control the LED GPIO
//
GPIO_setMasterCore(69, GPIO_CORE_CM);
// ////////////////////////////////////////
// Initializing the CM. Loading the required functions to SRAM.
//
CM_init();

SYSTICK_setPeriod(systickPeriodValue);
SYSTICK_enableCounter();
SYSTICK_registerInterruptHandler(SysTickIntHandler);
SYSTICK_enableInterrupt();

//
// Enable processor interrupts.
//
Interrupt_enableInProcessor();

// Set user/company specific MAC octets
// (for this code we are using A8-63-F2-00-00-80)
// 0x00 MACOCT3 MACOCT2 MACOCT1
ulUser0 = 0x00F263A8;

// 0x00 MACOCT6 MACOCT5 MACOCT4
ulUser1 = 0x00800000;

//
// Convert the 24/24 split MAC address from NV ram into a 32/16 split MAC
// address needed to program the hardware registers, then program the MAC
// address into the Ethernet Controller registers.
//
pucMACArray[0] = ((ulUser0 >> 0) & 0xff);
pucMACArray[1] = ((ulUser0 >> 8) & 0xff);
pucMACArray[2] = ((ulUser0 >> 16) & 0xff);
pucMACArray[3] = ((ulUser1 >> 0) & 0xff);
pucMACArray[4] = ((ulUser1 >> 8) & 0xff);
pucMACArray[5] = ((ulUser1 >> 16) & 0xff);

//
// Initialize ethernet module.
//
Ethernet_init(pucMACArray);

//
// Initialze the lwIP library, using DHCP.
//
lwIPInit(0, pucMACArray, IPAddr, NetMask, GWAddr, IPADDR_USE_STATIC);

// Initialize the UDP server
//
my_udp_init();

//
// Loop forever. All the work is done in interrupt handlers.
//
uint32_t cnt_FFT = 0;

Interrupt_setPriority(INT_EMAC_TX0, 2);
Interrupt_setPriority(INT_EMAC_RX0, 1);
Interrupt_enable(INT_EMAC_TX0);
Interrupt_enable(INT_EMAC_RX0);
Interrupt_enable(INT_EMAC);

volatile int cnt_total_loop=0;
volatile int cnt_total_mqtt_pub=0;
// ConfigureEnet();
while (1)
{

cnt_total_loop++;

if (Connected_udp_28000)
{
//UDP TX block

if (flag_TX_frame_UDP)
{
cnt_FFT++;

//flag_TX_frame_UDP = false;

/////////////////////////////////////////////
for (i = 0; i < PAYLOAD; i++)
{
if(i < buf_tx_start_msg_count)
{
buf_tx[i] = (uint8_t)buf_tx_start_msg[i];
}
else
{
buf_tx[i] = (uint8_t) (cnt_FFT);
}

}

////////////////////////////////////////////

pbuf1_tx = pbuf_alloc(PBUF_TRANSPORT, PAYLOAD, PBUF_RAM);
if (pbuf1_tx!= NULL)
{
pbuf1_tx->payload = (void*) buf_tx;
pbuf1_tx->tot_len = PAYLOAD; //17 // long_UDP_complete+4;
pbuf1_tx->len = PAYLOAD; //17 // long_UDP_complete+4;

udp_send(g_upcb, pbuf1_tx);

}

cnt_Connected_udp_28000++;

if (pbuf1_tx!= NULL)
pbuf_free(pbuf1_tx);

}

}

SysCtl_delay(6000000);//aprox 1 sec

sys_check_timeouts();

}
}

Ethernet config project code 

void main(void)
{

//
// Initialize device clock and peripherals
//
Device_init();

//
// Boot CM core
//
#ifdef _FLASH
Device_bootCM(BOOTMODE_BOOT_TO_FLASH_SECTOR0);
#else
Device_bootCM(BOOTMODE_BOOT_TO_S0RAM);
#endif

//
// Disable pin locks and enable internal pull-ups.
//
Device_initGPIO();

#ifdef ETHERNET
//
// Set up EnetCLK to use SYSPLL as the clock source and set the
// clock divider to 2.
//
// This way we ensure that the PTP clock is 100 MHz. Note that this value
// is not automatically/dynamically known to the CM core and hence it needs
// to be made available to the CM side code beforehand.
SysCtl_setEnetClk(SYSCTL_ENETCLKOUT_DIV_2, SYSCTL_SOURCE_SYSPLL);

//
// Configure the GPIOs for ETHERNET.
//

//

GPIO_setPadConfig(69, GPIO_PIN_TYPE_STD);
GPIO_setQualificationMode(69, GPIO_QUAL_SYNC);
GPIO_setDirectionMode(69, GPIO_DIR_MODE_OUT);
// GPIO_writePin(69,1);
GPIO_setControllerCore(69, GPIO_CORE_CPU1);
GPIO_writePin(69,1);
// 16TH PIN
GPIO_setPinConfig(GPIO_42_ENET_MDIO_CLK );

// 17TH PIN
GPIO_setPinConfig(GPIO_43_ENET_MDIO_DATA );
// 2ND PIN
GPIO_setPinConfig(GPIO_40_ENET_MII_CRS);

//
// / 1 PIN
GPIO_setPinConfig(GPIO_35_ENET_MII_COL);

// 11TH PIN
GPIO_setPinConfig( GPIO_59_ENET_MII_TX_DATA0 );

// 12TH PIN
GPIO_setPinConfig(GPIO_60_ENET_MII_TX_DATA1 );

// 13TH PIN
GPIO_setPinConfig(GPIO_61_ENET_MII_TX_DATA2 );

// 14TH PIN
GPIO_setPinConfig(GPIO_62_ENET_MII_TX_DATA3 );

// 10TH PIN
GPIO_setPinConfig(GPIO_56_ENET_MII_TX_EN);

// / 6TH PIN
GPIO_setPinConfig(GPIO_52_ENET_MII_RX_DATA0 );

// 7TH PIN
GPIO_setPinConfig(GPIO_53_ENET_MII_RX_DATA1);

// 8TH PIN
GPIO_setPinConfig(GPIO_54_ENET_MII_RX_DATA2);

// 9TH PIN
GPIO_setPinConfig(GPIO_55_ENET_MII_RX_DATA3);

// 5TH PIN
GPIO_setPinConfig(GPIO_51_ENET_MII_RX_ERR );
// 4TH PIN
GPIO_setPinConfig(GPIO_50_ENET_MII_RX_DV );

// 15TH PIN
GPIO_setPinConfig( GPIO_44_ENET_MII_TX_CLK );

// 18TH PIN
GPIO_setPinConfig(GPIO_67_ENET_MII_RX_CLK );

// 19TH PIN
// GPIO_setPinConfig( GPIO_68_ENET_MII_INTR);
GPIO_setDirectionMode(68, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(68, GPIO_PIN_TYPE_PULLUP);
GPIO_writePin(68,1);

// 3RD PIN
// GPIO_setPinConfig( GPIO_41_ENET_REVMII_MDIO_RST);
GPIO_setDirectionMode(41, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(41, GPIO_PIN_TYPE_PULLUP);
GPIO_writePin(41,1);
#endif

#ifdef MCAN
//
// Setting the MCAN Clock.
//
SysCtl_setMCANClk(SYSCTL_MCANCLK_DIV_4);

//
// Configuring the GPIOs for MCAN.
//
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANRXA);
GPIO_setPinConfig(DEVICE_GPIO_CFG_MCANTXA);
#endif

#ifdef CANA
//
// Configuring the GPIOs for CAN A.
//
GPIO_setPinConfig(DEVICE_GPIO_CFG_CANRXA);
GPIO_setPinConfig(DEVICE_GPIO_CFG_CANTXA);

//
// Allocate Shared Peripheral CAN A to the CM Side.
//
SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_CAN_A,0x1U);
#endif

#ifdef CANB
//
// Configuring the GPIOs for CAN B.
//
GPIO_setPinConfig(DEVICE_GPIO_CFG_CANRXB);
GPIO_setPinConfig(DEVICE_GPIO_CFG_CANTXB);

//
// Allocate Shared Peripheral CAN B to the CM Side.
//
SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_CAN_B,0x1U);
#endif

#ifdef UART
//
// Configure GPIO85 as the UART Rx pin.
//
GPIO_setPinConfig(GPIO_85_UARTA_RX);
GPIO_setDirectionMode(85, GPIO_DIR_MODE_IN);
GPIO_setPadConfig(85, GPIO_PIN_TYPE_STD);
GPIO_setQualificationMode(85, GPIO_QUAL_ASYNC);

//
// Configure GPIO84 as the UART Tx pin.
//
GPIO_setPinConfig(GPIO_84_UARTA_TX);
GPIO_setDirectionMode(84, GPIO_DIR_MODE_OUT);
GPIO_setPadConfig(84, GPIO_PIN_TYPE_STD);
GPIO_setQualificationMode(84, GPIO_QUAL_ASYNC);
#endif

#ifdef USB
#ifdef USE_20MHZ_XTAL
//
// Set up the auxiliary PLL so a 60 MHz output clock is provided to the USB module.
// This fixed frequency is required for all USB operations.
//
SysCtl_setAuxClock(SYSCTL_AUXPLL_OSCSRC_XTAL |
SYSCTL_AUXPLL_IMULT(48) |
SYSCTL_REFDIV(2U) | SYSCTL_ODIV(4U) |
SYSCTL_AUXPLL_DIV_2 |
SYSCTL_AUXPLL_ENABLE |
SYSCTL_DCC_BASE_0);
#else
//
// Set up the auxiliary PLL so a 60 MHz output clock is provided to the USB module.
// This fixed frequency is required for all USB operations.
//
SysCtl_setAuxClock(SYSCTL_AUXPLL_OSCSRC_XTAL |
SYSCTL_AUXPLL_IMULT(48) |
SYSCTL_REFDIV(2U) | SYSCTL_ODIV(5U) |
SYSCTL_AUXPLL_DIV_2 |
SYSCTL_AUXPLL_ENABLE |
SYSCTL_DCC_BASE_0);
#endif

//
// Allocate Shared Peripheral USB to the CM Side.
//
SysCtl_allocateSharedPeripheral(SYSCTL_PALLOCATE_USBA, 1);

GPIO_setPinConfig(GPIO_0_GPIO0);
GPIO_setPadConfig(0, GPIO_PIN_TYPE_STD);
GPIO_setDirectionMode(0, GPIO_DIR_MODE_OUT);
GPIO_setMasterCore(0, GPIO_CORE_CM);

//
// Set the master core of GPIOs to CM.
//
GPIO_setMasterCore(42, GPIO_CORE_CM);
GPIO_setMasterCore(43, GPIO_CORE_CM);
GPIO_setMasterCore(46, GPIO_CORE_CM);
GPIO_setMasterCore(47, GPIO_CORE_CM);
GPIO_setMasterCore(120, GPIO_CORE_CM);
GPIO_setMasterCore(121, GPIO_CORE_CM);

//
// Set the USB DM and DP GPIOs.
//
GPIO_setAnalogMode(42, GPIO_ANALOG_ENABLED);
GPIO_setAnalogMode(43, GPIO_ANALOG_ENABLED);

//
// Set the direction for VBUS and ID.
//
GPIO_setDirectionMode(46, GPIO_DIR_MODE_IN);
GPIO_setDirectionMode(47, GPIO_DIR_MODE_IN);

//
// Configure the Power Fault.
//
GPIO_setMasterCore(120, GPIO_CORE_CM);
GPIO_setDirectionMode(120, GPIO_DIR_MODE_IN);

//
// Configure the External Power Signal Enable.
//
GPIO_setMasterCore(121, GPIO_CORE_CM);
GPIO_setDirectionMode(121, GPIO_DIR_MODE_OUT);
GPIO_writePin(121, 1);

//
// Set the CM Clock to run at 120MHz.
// The CM Clock is a fractional multiple of the AUXPLL Clock (120 Mhz) from
// which the USB Clock (60 MHz) is derived.
//
SysCtl_setCMClk(SYSCTL_CMCLKOUT_DIV_1, SYSCTL_SOURCE_AUXPLL);
#endif
}

Hi,

The code for the CM core need not have the following lines

#ifdef _FLASH
Device_bootCM(BOOTMODE_BOOT_TO_FLASH_SECTOR0);
#else
Device_bootCM(BOOTMODE_BOOT_TO_S0RAM);
#endif

This is handled by the C28x core.  It should boot up the CM core. 

Did you try debugging to see where the code execution is halted?

Best Regards

Siddharth

Hi Siddharth,

Actually when I debug my code run fine.

Tell me How to use CCS to load and run c28 and cm code.

I read this thread ( https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/1223164/tmdscncd28388d-how-to-use-ccs-to-load-and-run-c28-and-cm-code-so-enet-examples-run-well ) but as far as I understand, we are connecting to the target (CPU1 and CM core) by going into debug mode.

Tell me how to burn the code in CPU1 and CM core without using debug.

Thanks.

Hi Sudhir,

After connecting to the core in the debug session, you can only load the symbols using Run-> load symbols in CCS.  You can then run the code and see if it is getting stuck at any point.

Best Regards

Siddharth