Hi,
Is there a way to delay the clocking of words out of the FIFO after toggling the hardware CS low. I want to give the peripheral SPI device enough time to prepare the RXFIFO before the host begins clocking. I know I could do this with a software CS, but I'm curious if there is something built-in for this. I see the delayed transfer mode, but I think that is per word.
Thanks,
Anurag
