F28M35/Concerto Register updates and other issues

Thank you Lori!

I think I understand what you mean about the registers on the M3 :)
I read the Technical Reference Manual 3.1.3 section a little too fast and miss that 3.1.3.2.2 about the registers in the M3,  as well as the 3.1.3.5 section about Commit Control, were its said that PB7 (NMI) is protected due to:

"The GPIO commit control registers provide a layer of protection against accidental programming of critical hardware peripherals. Protection is provided for the NMI pin (PB7)."

It doesn't explain how to remove this protection and browsing the "F28M35x Peripheral Driver Library" pdf, section 8.2 we see that there is no GPIO lock/unlock/status but in the new gpio.c and gpio.h sent by you, those functions exist:

GPIOPinLock(unsigned long ulPort, unsigned char ucPins)
GPIOPinUnlock(unsigned long ulPort, unsigned char ucPins)
GPIOPinLockStatus(unsigned long ulPort, unsigned char ucPins)

Anyhow, I now know what to do. Amazing job! Thank you for your answer!

Rui

Dear Lori,

I have the same problem with PB7 but with the UART1 peripheral,
I did as you said and unlocked that pin but I can't seem to get interrupts on UART1.
Any other pin for UART1 and PORTB works fine just not PB6 and PB7 (which I need for standalone mode with the concerto controlCard).

Here is my code (It's a simple gateway between 2 uart modules - UART1IntHandler doesn't fire):

void main(void)
{
 // Allow writes to protected registers.
 HWREG(SYSCTL_MWRALLOW) = 0xA5A5A5A5;

// Enable processor interrupts.
 IntMasterEnable();

SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
 SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);

// Set GPIO A0 and A1 as UART pins (0 - RX, 1 - TX).
 GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
 GPIOPinConfigure(GPIO_PA0_U0RX);
 GPIOPinConfigure(GPIO_PA1_U0TX);

// Set GPIO B0 and B1 as UART pins (8 - RX, 9 - TX).
 SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
 SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1);
 GPIOPinUnlock(GPIO_PORTB_BASE, GPIO_PIN_7);
 GPIOPinConfigure(GPIO_PB7_U1RX);
 GPIOPinConfigure(GPIO_PB6_U1TX);
 GPIOPinTypeUART(GPIO_PORTB_BASE, GPIO_PIN_6 | GPIO_PIN_7);

// Configure the UART for 460,800, 8-N-1 operation.
 UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(SYSTEM_CLOCK_SPEED), 460800,
 (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));

// Configure the UART for 460,800, 8-N-1 operation.
 UARTConfigSetExpClk(UART1_BASE, SysCtlClockGet(SYSTEM_CLOCK_SPEED), 460800,
 (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE));

// Enable the UART interrupt.
 UARTEnable(UART0_BASE);
 IntRegister(INT_UART0, UART0IntHandler);
 IntEnable(INT_UART0);
 UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT);

UARTEnable(UART1_BASE);
 IntRegister(INT_UART1, UART1IntHandler);
 IntEnable(INT_UART1);
 UARTIntEnable(UART1_BASE, UART_INT_RX | UART_INT_RT);

for(;;);
}

void UART0IntHandler(void)
{
 unsigned long ulStatus;

// Get the interrupt status.
 ulStatus = UARTIntStatus(UART0_BASE, true);

// Clear the asserted interrupts.
 UARTIntClear(UART0_BASE, ulStatus);

// Loop while there are characters in the receive FIFO.
 while (UARTCharsAvail(UART0_BASE))
 {
 long data = UARTCharGetNonBlocking(UART0_BASE);
 UARTCharPutNonBlocking(UART1_BASE, (unsigned char) data);
 }
}

void UART1IntHandler(void)
{
 unsigned long ulStatus;

// Get the interrupt status.
 ulStatus = UARTIntStatus(UART1_BASE, true);

// Clear the asserted interrupts.
 UARTIntClear(UART1_BASE, ulStatus);

// Loop while there are characters in the receive FIFO.
 while (UARTCharsAvail(UART1_BASE))
 {
 long data = UARTCharGetNonBlocking(UART1_BASE);
 UARTCharPutNonBlocking(UART0_BASE, (unsigned char) data);
 }
}

Thanks,

Yoel