TMS320F280049: CLB simulation

Hello Hamidreza,

Have you already referred to the CLB Tool User's Guide? Please verify you enabled the simulation output checkbox in the Tile Design module under the Global Parameters options at the top and you have executed the clb_simulation file.

Yeah, everything is set

here you can see that the generated .vcd file is wrong.
my counter is enabled but the signal match to zero is always 1.

I used this logic and it is correct also when I run it on the hardware but here is not working properly, I think there is something with the update of ccs or C2000ware because I run the same logic with using old updates and it is working.

Hello Hamidreza,

This is working on my side when I don't have the reset signal wired as you have above. Please confirm your configuration for the CLB tile (i.e. the counter is counting when the counter reset is NOT low). If the CLB is not counting even when the reset gets pulled high in the simulation, please confirm that you have the latest version of C2000Ware installed.

Hello Omer I have the same problem as Hamidreza

I have implemented a simple coutner that generates a Match1 signal every 120 clocks and resets the counter. The design runs on the controller without any problems and I can measure the Match1 signal with the oscilloscope.

In the simulation the counter doesn't count, it only counts if I install an inverter in the feedback of Match1 then everything is ok, but this implementation no longer runs on the controller in the real world

The examples in C2000Ware_5_02_00_00 have the same problem I work with CCS 12.7 and the tools from SPRUIR8B - APRIL 2020 - REVISED JULY 2023 (tdm and gtkwave)

Hi Harald,

Omer is no longer supporting CLB questions. I will need some time to recreate your issue on my side. Will get back to you early next week.

Thank you,

Luke

Hi Harald,

I am still looking into this issue.

--Luke

Hi Harald, apologies for the delay, I was on vacation for most of June, I will get back to you once I'm able to test this.

thank you,

Luke

I found the similar issue. I work on the LAUNCHXL-28P65DK9, and the CLB simulation result indicates that the tile counter will reset at the falling edge not the rising edge of the input signal. It is different with the presentation in the 28P65x TRM.

Hi Songmingbo,

I am looking into this issue, will respond back once I identify the fix for this in simulation.

Thank you,

Luke

Hello, 

Thank you so much for fixing it.

I will provide an update once I identify the cause of this issue

Songmingo, Harald,

Our CLB software expert is looking into how to update the simulation behavior, will update you when I receive a response.

Thank you,

Luke

Hi, Luke.

You're so professional. The emulation is working normally! Thanks a lot.

Mingbo Song