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TMS320F28379D: ADC Calibration and offsets

Part Number: TMS320F28379D

Hi,

Am trying to calibrate the ADCs. I have used a known voltage source for one of the ADCs to sense the voltage and the output seems appropriate without enabling the PWM.

The output has no offset therefore am concluding the ADCs are working accordingly.

Once i enable the PWM and without enabling anything else such as current controller, i end up with an offset of 90V as shown below. 

Is there something i need to consider? Am not the original author of the code and am trying to debug it. 

I have checked initialisation of the PWM and the code is shown below.

void Enable_Converter(void)
{
Relay_control(0, 1); //switch on contactor and pass the 2 arguments in the brackets (0 represents the the contactor to be controlled and 1 represents ON state
GpioDataRegs.GPADAT.bit.GPIO0 = 1; // Set LED to show PWM status

PWM_En = 1;
*(Uint16 *)FPGA_REG_08 = 0;//0xFFFF; // Enable pwm output
*(Uint16 *)FPGA_REG_08 |= 1<<5; // performs a bitwise OR operation to set the 6th bit (1<<5) of the value stored at FPGA_REG_08 to 1.

*(Uint16 *)FPGA_REG_08 |= 1<<8; //phase A // sets the 9th bit (1<<8) of the value stored at FPGA_REG_08 to 1
*(Uint16 *)FPGA_REG_08 |= 1<<9; //phase b // sets the 10th bit (1<<9) of the value stored at FPGA_REG_08 to 1
*(Uint16 *)FPGA_REG_08 |= 1<<10; //phase c // sets the 11th bit (1<<10) of the value stored at FPGA_REG_08 to 1

}



void Modulator(float DCYa,float DCYb,float DCYc,float DCYn,float DCYaux1,float DCYaux2) // Represent duty cycle values for different channels or phases of the modulator.
{
float halfPeriod=0; // represents half of the modulation period
int tX;

halfPeriod = ((float)FPGA_PWM_CLK / (1000*curr_FSW))/2;

if(DCYa>0.95) DCYa=0.95; // Duty Cycle values checked and adjusted
if(DCYa<0.05) DCYa=0.05;
tX = halfPeriod*DCYa;
if(tX<=0) tX=1;
if(tX>=halfPeriod) tX=halfPeriod-1;

*(Uint16 *)FPGA_REG_16 = (Uint16)(0xFFFF-halfPeriod-tX); //tON // values are written to the respective registers
*(Uint16 *)FPGA_REG_17 = (Uint16)(0xFFFF-halfPeriod+tX); //tOFF

if(DCYb>0.95) DCYb=0.95;
if(DCYb<0.05) DCYb=0.05;
tX = halfPeriod*DCYb;
if(tX<=0) tX=1;
if(tX>=halfPeriod) tX=halfPeriod-1;

*(Uint16 *)FPGA_REG_18 = (Uint16)(0xFFFF-halfPeriod-tX);
*(Uint16 *)FPGA_REG_19 = (Uint16)(0xFFFF-halfPeriod+tX);

if(DCYc>0.95) DCYc=0.95;
if(DCYc<0.05) DCYc=0.05;
tX = halfPeriod*DCYc;
if(tX<=0) tX=1;
if(tX>=halfPeriod) tX=halfPeriod-1;

*(Uint16 *)FPGA_REG_20 = (Uint16)(0xFFFF-halfPeriod-tX);
*(Uint16 *)FPGA_REG_21 = (Uint16)(0xFFFF-halfPeriod+tX);

if(DCYn>0.95) DCYn=0.95;
if(DCYn<0.05) DCYn=0.05;
tX = halfPeriod*DCYn;
if(tX<=0) tX=1;
if(tX>=halfPeriod) tX=halfPeriod-1;

*(Uint16 *)FPGA_REG_22 = (Uint16)(0xFFFF-halfPeriod-tX);
*(Uint16 *)FPGA_REG_23 = (Uint16)(0xFFFF-halfPeriod+tX);

if(DCYaux1>0.95) DCYaux1=0.95;
if(DCYaux1<0.05) DCYaux1=0.05;
tX = halfPeriod*DCYaux1;
if(tX<=0) tX=1;
if(tX>=halfPeriod) tX=halfPeriod-1;

*(Uint16 *)FPGA_REG_24 = (Uint16)(0xFFFF-halfPeriod-tX);
*(Uint16 *)FPGA_REG_25 = (Uint16)(0xFFFF-halfPeriod+tX);

if(DCYaux2>0.95) DCYaux2=0.95;
if(DCYaux2<0.05) DCYaux2=0.05;
tX = halfPeriod*DCYaux2;
if(tX<=0) tX=1;
if(tX>=halfPeriod) tX=halfPeriod-1;

*(Uint16 *)FPGA_REG_26 = (Uint16)(0xFFFF-halfPeriod-tX);
*(Uint16 *)FPGA_REG_27 = (Uint16)(0xFFFF-halfPeriod+tX);
}

Within the interrupt routine, i have the following;

if(PWM_En)
{
*(Uint16 *)FPGA_REG_08 = 1<<5 | 1<<8 | 1<<9 | 1<<10; // ENABLE PWM phase A,B,C

/*
* CURRENT CONTROLLERS Id, Iq (Output is VdSS & VqSS)
*/

VdSS= DCL_runPI_C1(&PI_Id, Id_REF, Park.Id);


VqSS= DCL_runPI_C1(&PI_Iq, Iq_REF, Park.Iq);


//V0SS= DCL_runPI_C1(&PI_I0, 0, Park.I0); // Zero Sequence
lowpass(AdcReadings.Vdc/2,&V0SS,0.001);


//CAPTURE.flag=1; //capture data

}

else{
*(Uint16 *)FPGA_REG_08 = 0; //DISABLE PWM output

//RESET CURRENT PIs
PI_Id.i10=Park.Vd;
PI_Iq.i10=Park.Vq;
VdSS=Park.Vd;
VqSS=Park.Vq;
V0SS=Park.V0;

}

INVdq0(VdSS/AdcReadings.Vdc,VqSS/AdcReadings.Vdc,V0SS/AdcReadings.Vdc,&DCYa,&DCYb,&DCYc,PLL_vars.sinTheta,PLL_vars.cosTheta);

Modulator(DCYa,DCYb,DCYc,0,0,0); // Normalised PWM modulating signals

Kind regards

Edwin

  • Hello Edwin,

    (I hope you don't mind, but I've placed your code into code blocks to make this post easier to read)

    Can you please provide output comparisons directly from the ADC readings themselves? The output voltage you're showing is evidently something else in your system which the ADC affects, but our datasheet does not spec this sort of performance, only the ADC performance itself.

    Also, if the behavior is not ADC related, what system or reference design are you using here? It may be possible another expert needs to help with your query.

  • Hi Omer, 

    I managed to solve the issue. 

    Please close the thread.

    Kind regards

    Edwin