TMS320F2800157: eCAP - Interrupt Source - Counter Equals Compare ISR Source

Hi, Ryan

Thanks for the clarity! But we need the feature in eCAP Capture mode, where rising edge is used to reset the counter. If the counter reset is not happening for let's say 1 second then ISR should be raised. If we are using overflow option it is taking 42 seconds approx before the ISR is raised, By using the compare register the problem can be solved by setting the register value which can give me 1 second delay and not overflow the counter register value.

Hi Kaustuv,

Unfortunately you cannot use the CMP events when in capture mode. Do you have any timers or other ISRs that occur every 1 s so you can check the TSCTR and if it's above 1s then force an eCAP interrupt?

Best,

Ryan Ma

We are not using any timers as it may take CPU cycles and ISR will be raised on every cycle. The main purpose is to avoid frequent ISR calls, and only one time when pulse is not there (pulse stuck at 0 or 1) ISR call will be raised. Mainly we are trying to get the problem solved by hardware. Is there anyway to solve the exact problem using any other module like eQEP, ePWM?

Problem:

Continuous pulse of let's say 1 Hz on any GPIO. If pulse is there then no ISR will be raised else if pulse stuck at zero or one for 1 second then it should immediately raise interrupt.

Here in the eCAP solution by adjusting the compare register value we can get a delay of 1 seconds and raise interrupt if the compare register value equals counter register.

Hi Kaustuv,

I am looking to see if there is a possible way to do this using hardware. 

Best,

Ryan Ma