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TMS320F28377D: Why the register offset address are divided by 2 in library code

Part Number: TMS320F28377D
Other Parts Discussed in Thread: C2000WARE

I am asking about the macro definition in F2837xD_Gpio_defines.h, which is the library code from TI.

Why are the register offset addresses all divided by 2 as below?

#define GPY_CTRL_OFFSET (0x40/2)
#define GPY_DATA_OFFSET (0x8/2)

#define GPYQSEL (0x2/2)
#define GPYMUX (0x6/2)
#define GPYDIR (0xA/2)
#define GPYPUD (0xC/2)
#define GPYINV (0x10/2)
#define GPYODR (0x12/2)
#define GPYGMUX (0x20/2)
#define GPYCSEL (0x28/2)
#define GPYLOCK (0x3C/2)
#define GPYCR (0x3E/2)

I thought that the offset addresses in datasheet were not the offset for addresses, should be the size of the registers. But I have not found any related information.

Thank you in advance if any answers.

  • Hi Harley,

    These constants are divided by two because they are used as pointers for 32 bit words. Since C2000 devices are 16 bit addressable, dividing the offset addresses by two will provide the correct pointer address when dealing with 32 bit words:

    Let me know if this answers your question.

    Thank you,

    Luke

  • Hi Luke,

    May I understand that as following?

    1. one address in C2000 is including 16 bit data, e.g. QSEL1 bit 0-15. thus, 1 pointer for 32 bit is including 32 bit data, so one pointer for Uint32 is indicating CTRL bit 0-31.

    2. If I use 16 bit pointer, 1 pointer will includes 16 bit. There address offset will be same as datasheet and do not need to be divided by 2. Is there any problem to use Uint16 pointer?

    Otherwise, how could I identify the device is 16 bit addressable? Does it mean the device is 32 bit addressable if the Offset in datasheet for GPAQSEL1 is 1h; opposite, offset is 4h for GPAQSEL1, it means 8 bit addressable?

  • Hi Harley,

    Let me rephrase my previous response:

    The defines you mentioned are described in C2000Ware as "helpful constants for array-based access to GPIO registers":

    When dealing with arrays, the index of the array corresponds with different offset addresses depending on the data type that array contains. C2000 devices are 16 bit addressable, meaning for every memory address, their are 16 bits stored. This applies for all memory and registers.

    When dealing with an array of 32 bit words in C2000, each index in the array corresponds with an increase in the offset address of 2. So if you had an array starting at the beginning of your GPIO registers and wanted to access GPYDIR, you would use the index in the screenshot above, however the offset address used to access that register would be double the array index.

    Let me know if this makes sense.

    Thank you,

    Luke