Hello,
I am working on a 16bit SDRAM application using the EMIF peripheral. Can confirm that I am able to write/read to/from the external SDRAM (far memory location 0x80000000), using both the CPU and DMA. But I have a couple of queries,
1) Trying to use the memory browser in CCS debugger, to view and verify the data being written to the SDRAM, when I look at address: 0x80000000 and above, the memory map shows no data. I hover over the memory locations and the message displayed is "memory map prevented reading 0x80000000@Data". I didn't have this problem when working with the delfino part. Is this a known issue with the F28P65x?
2) My DMA initialization and setup is very similar to the TI provided example for this part "emif_ex5_16bit_sdram_dma.c". In order for the DMA write and read operations to succeed, I am having to define/allocate the read and write data buffers in RAMGS0 and RAMGS1. The example does this as well,
