Dear champs,
Do CLB input signal such as EPWM CMPA, CMPB, CMPC, and CPMD also support shadow update? Thanks!

Best Regards,
Julia
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Dear champs,
Do CLB input signal such as EPWM CMPA, CMPB, CMPC, and CPMD also support shadow update? Thanks!

Best Regards,
Julia
Hi Julia,
The shadow load typically occurs on some event such as TBCTR=ZERO or TBCTR=PRD. As you can see in the table, these events are also inputs to the CLB(EPWM2_CTR_ZERO).
Let me know if you have additional questions.
Thank you,
Luke
Hi Luke,
Yes shadow load will occor on these event, now I want to know, for example EPWM2_CTR_CMPA, this event occor when CTR=CMPA, is this CMPA support shadow load, that means this event of CMPA is updated when TBCTR=ZERO or TBCTR=PRD? Thanks!
Best Regards,
Julia
Hi Julia,
The EPWM2_CTR_CMPA is generated based on the value of the active register for CMPA, not the shadow register. There is the option to use immediate mode for CMPA by disabling shadow loading, but this is not recommended for most EPWM applications.
Let me know if this answers your question.
Thank you,
Luke
Hi Luke,
Does this mean that if EPWM use shadow mode, the value of the shadow register will be loaded into the active register and take effect when an event occurs (such as CTR=PRD). At this time, the input of CLB is always connected to the active register, that is, this input is also be updated from the shadow register when an event occurs (such as CTR=PRD). Is my understanding correct?
Best Regards,
Julia
Hi Julia,
The events listed in the CLB table above occur depending on the value of TBCTR. A pulse is sent to the CLB as follows:
EPWMx_CTR_CMPA: when TBCTR = CMPA(active)
EPWMx_CTR_PRD: when TBCTR = TBPRD(active)
EPWMx_CTR_ZERO: when TBCTR = 0
the values in the shadow register have no effect on these signals until they are loaded into the active register.
Let me know if this makes sense.
Thank you,
Luke