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TMS320F28P650DK: Maximum SRAM on EMIF1 for CODE+DATA. I'm a little confused.

Peter Adamcik
Intellectual 360 points

Part Number: TMS320F28P650DK

Hi guys. I'm a little confused about the maximum size SRAM (EMIF_CS2  for CODE+DATA) I can connect to my MCU. My MCU is the 176PIN.

The datasheet says at 7.3.4 maximum SRAM is 256k x16bit. The EMIF1 has address pins that range from EMIF1_A0 to EMIF1_A19 which is equal to 512k of memory for data or code and can be configured to use 32bit sram.

So what do I do? setup EMIF for 512k x16bit address space but the MCU will only access maximum 256k address space.

I would like toconnect 512k x 16bit SRAM for code+data to my MCU.

Can someone please let me know what is the maximum SRAM the MCU can access for CODE+DATA (EMIF1_CS2).

Thanks guys, hope to hear from you soon.

Pete Slight smile

  • +1
    TI__Guru**** 201386 points

    Hi Pete,

    The EMIF address pin EMIF_A[0] always provides the least significant bit of a 32-bit word address. The EMIF with 19 address pins can support up to 2^20 words. 

    From the notes of Table 7-5 in Datasheet, the CS2n is only available from 0x30_0000 to 0x33_FFFF when CS0n is mapped at 0x2x_0000. But the maximum memory size is listed in the 2nd column of the table.

  • 0 in reply to QJ Wang
    Intellectual 360 points

    Hi QJ Wang, thank you for the reply. So what you're saying is that the MCU can support 1MB of code+data memory? That's great but how do I use the full 1MB of address space for my ASM code + data?

    CS2=256k, CS3=256K, CS4=393K. Total memory is 905K, what about the extra 119K to make 1MB, how do I use that?

    Pete Slight smile

  • 0 in reply to Peter Adamcik
    TI__Guru**** 201386 points

    Hi Pete,

    The EMIF with 19 address lines has the capability to support 1M words. But the actual memory size is limited by the design. On this device, the maximum size is 512K for CS0, and the maximum memory size is 256K for CS2, etc. If one 640K size memory is attached to EMIF CS0, you can access only 512K of them.