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TMS320F28388D: Example methodology for reprogramming CPU2 and CM flash banks via LFU utilizing CAN

Part Number: TMS320F28388D


Hello,

I am looking to utilize LFU with the TMS320F28388D. I know there are no examples specific to this microcontroller for LFU, and there is some uniqueness involved in doing LFU with a single flash bank. Given the examples on other processors in this family, I think I understand what needs to occur from the overall LFU perspective with a single flash bank. I want to see if my basic approach to performing an LFU for CPU2 and CM is correct.

From a very high level perspective, would it be something like -

Assumptions: I do not need to update CPU1 firmware; all necessary support is stored in sector of flash separate from firmware to update and is moved to RAM.

  1. CAN and IPC support executes on CPU1.
  2. CPU2 and CM execute IPC support and Flash API from their respective RAMs (after moved off of flash).
  3. CPU1 receives firmware update for CPU2 from a server utilizing CAN.
  4. CPU1 uses IPC to provide firmware update to CPU2.
  5. CPU2 uses Flash API to update it's own flash bank with new firmware provided by CPU1.
  6. CPU1 receives firmware update for CM from a server utilizing CAN.
  7. CPU1 uses IPC to provide firmware update to CM.
  8. CPU2 uses Flash API to update it's own flash bank with new firmware provided by CPU1.

I know that is a very rudimentary explanation, but is that the gist of what would need to be done?

Thanks for the help!

  • Scott,

    I think you've got all the basic concepts and steps right.

    My assumption would be that you would have flash bootloaders (BL) in CPU1, CPU2, and CM to facilitate the LFU i.e. the ones in CPU2 and CM will interface with the BL in CPU1 to receive the image and program the Flash. In that case, in addition to the Flash APIs in RAM, some of the BL code would also need to be in RAM (this I believe you understand based on your comment).

    Thanks,

    Sira